messages from 2020-08-11 04:57:51 to 2020-08-14 10:14:39 UTC [more...]
[Intel-gfx] [PATCH 1/8] Critical KlockWork Error - Fixes - intel_cdclk.c - Possible NullPointerDereference1
2020-08-14 10:14 UTC (10+ messages)
` [Intel-gfx] [PATCH 2/8] Critical KlockWork Error - Fixes - intel_atomic.c "
` [Intel-gfx] [PATCH 3/8] Critical KlockWork Error - Fixes - intel_fbdev.c "
` [Intel-gfx] [PATCH 4/8] Critical KlockWork Error - Fixes - intel_display.c "
` [Intel-gfx] [PATCH 5/8] Critical KlockWork Error - Fixes - intel_sdvo.c "
` [Intel-gfx] [PATCH 6/8] Critical KlockWork Error - Fixes - intel_tv.c "
` [Intel-gfx] [PATCH 7/8] Critical KlockWork Error - Fixes - intel_display_power.c - Possible NullPointerDereference2
` [Intel-gfx] [PATCH 8/8] Critical KlockWork Error - Fixes - intel_combo_phy.c Uninitialized Variable-1
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/8] Critical KlockWork Error - Fixes - intel_cdclk.c - Possible NullPointerDereference1
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
[Intel-gfx] [PATCH] drm/modeset-lock: Take the modeset BKL for legacy drivers
2020-08-14 10:09 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [Regression] "drm/i915: Implement display w/a #1143" breaks HDMI on ASUS GL552VW
2020-08-14 5:13 UTC (4+ messages)
[Intel-gfx] [CI] PR for new DMC and HuC firmwares for TGL and RKL v2
2020-08-13 22:53 UTC
[Intel-gfx] [PATCH 1/2] drm/i915: Update TGL and RKL DMC firmware versions
2020-08-13 20:46 UTC (3+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Update TGL and RKL HuC "
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update TGL and RKL DMC "
[Intel-gfx] [CI] PR for new DMC and HuC firmwares for TGL and RKL
2020-08-13 18:12 UTC
[Intel-gfx] [PATCH v2 0/5] Fixes and improvements for Xen pvdrm
2020-08-13 16:30 UTC (16+ messages)
` [Intel-gfx] [PATCH v2 1/5] xen/gntdev: Fix dmabuf import with non-zero sgt offset
` [Intel-gfx] [PATCH v2 2/5] drm/xen-front: Fix misused IS_ERR_OR_NULL checks
` [Intel-gfx] [PATCH v2 3/5] drm/xen-front: Add YUYV to supported formats
` [Intel-gfx] [PATCH v2 4/5] xen: Sync up with the canonical protocol definition in Xen
` [Intel-gfx] [PATCH v2 5/5] drm/xen-front: Pass dumb buffer data offset to the backend
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fixes and improvements for Xen pvdrm (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/20] Convert all remaining drivers to GEM object functions
2020-08-13 13:57 UTC (35+ messages)
` [Intel-gfx] [PATCH 01/20] drm/amdgpu: Introduce "
` [Intel-gfx] [PATCH 02/20] drm/armada: "
` [Intel-gfx] [PATCH 03/20] drm/etnaviv: "
` [Intel-gfx] [PATCH 04/20] drm/exynos: "
` [Intel-gfx] [PATCH 05/20] drm/gma500: "
` [Intel-gfx] [PATCH 06/20] drm/i915: "
` [Intel-gfx] [PATCH 07/20] drm/mediatek: "
` [Intel-gfx] [PATCH 08/20] drm/msm: Introduce GEM object funcs
` [Intel-gfx] [PATCH 09/20] drm/nouveau: Introduce GEM object functions
` [Intel-gfx] [PATCH 10/20] drm/omapdrm: "
` [Intel-gfx] [PATCH 11/20] drm/pl111: "
` [Intel-gfx] [PATCH 12/20] drm/radeon: "
` [Intel-gfx] [PATCH 13/20] drm/rockchip: Convert to drm_gem_object_funcs
` [Intel-gfx] [PATCH 14/20] drm/tegra: Introduce GEM object functions
` [Intel-gfx] [PATCH 15/20] drm/vc4: "
` [Intel-gfx] [PATCH 16/20] drm/vgem: "
` [Intel-gfx] [PATCH 17/20] drm/vkms: "
` [Intel-gfx] [PATCH 18/20] drm/xen: "
` [Intel-gfx] [PATCH 19/20] drm/xlnx: Initialize DRM driver instance with CMA helper macro
` [Intel-gfx] [PATCH 20/20] drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Convert all remaining drivers to GEM object functions
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH 1/3] drm/i915: Cancel outstanding work after disabling heartbeats on an engine
2020-08-13 12:11 UTC (12+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Always send a pulse down the engine after disabling heartbeat
` [Intel-gfx] [PATCH 3/3] drm/i915/gem: Always test execution status on closing the context
` [Intel-gfx] [PATCH] "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Cancel outstanding work after disabling heartbeats on an engine
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Cancel outstanding work after disabling heartbeats on an engine (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Cancel outstanding work after disabling heartbeats on an engine (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v7 00/17] drm/i915: Add support for HDCP 1.4 over MST
2020-08-13 9:17 UTC (16+ messages)
` [Intel-gfx] [PATCH v7 15/17] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message
` [Intel-gfx] [PATCH v7 17/17] drm/i915: Add HDCP 1.4 support for MST connectors
[Intel-gfx] [PATCH v5 00/22] Introduce DG1
2020-08-13 8:07 UTC (13+ messages)
` [Intel-gfx] [PATCH v5 03/22] drm/i915/dg1: Add DG1 power wells
` [Intel-gfx] [PATCH v5 06/22] drm/i915/dg1: Add DPLL macros for DG1
` [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers
[Intel-gfx] [PATCH] drm/i915: Apply Wa_14011264657:gen11+
2020-08-13 3:28 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Apply Wa_14011264657:gen11+ (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2] drm/i915/gt: Implement WA_1406941453
2020-08-12 21:53 UTC (2+ messages)
[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_persistence: Exercise cleanup after disabling heartbeats
2020-08-12 21:33 UTC (2+ messages)
[Intel-gfx] [PATCH 00/24] drm/i915: Correct the locking hierarchy in gem
2020-08-12 21:29 UTC (49+ messages)
` [Intel-gfx] [PATCH 01/24] Revert "drm/i915/gem: Async GPU relocations only"
` [Intel-gfx] [PATCH 02/24] drm/i915: Revert relocation chaining commits
` [Intel-gfx] [PATCH 03/24] Revert "drm/i915/gem: Drop relocation slowpath"
` [Intel-gfx] [PATCH 04/24] Revert "drm/i915/gem: Split eb_vma into its own allocation"
` [Intel-gfx] [PATCH 08/24] drm/i915: Use per object locking in execbuf, v12
` [Intel-gfx] [PATCH 09/24] drm/i915: make lockdep slightly happier about execbuf
` [Intel-gfx] [PATCH 10/24] drm/i915: Use ww locking in intel_renderstate
` [Intel-gfx] [PATCH 11/24] drm/i915: Add ww context handling to context_barrier_task
` [Intel-gfx] [PATCH 12/24] drm/i915: Nuke arguments to eb_pin_engine
` [Intel-gfx] [PATCH 13/24] drm/i915: Pin engine before pinning all objects, v5
` [Intel-gfx] [PATCH 14/24] drm/i915: Rework intel_context pinning to do everything outside of pin_mutex
` [Intel-gfx] [PATCH 15/24] drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin
` [Intel-gfx] [PATCH 16/24] drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2
` [Intel-gfx] [PATCH 17/24] drm/i915: Kill last user of intel_context_create_request outside of selftests
` [Intel-gfx] [PATCH 18/24] drm/i915: Convert i915_perf to ww locking as well
` [Intel-gfx] [PATCH 19/24] drm/i915: Dirty hack to fix selftests locking inversion
` [Intel-gfx] [PATCH 20/24] drm/i915/selftests: Fix locking inversion in lrc selftest
` [Intel-gfx] [PATCH 21/24] drm/i915: Use ww pinning for intel_context_create_request()
` [Intel-gfx] [PATCH 22/24] drm/i915: Move i915_vma_lock in the selftests to avoid lock inversion, v3
` [Intel-gfx] [PATCH 23/24] drm/i915: Add ww locking to vm_fault_gtt
` [Intel-gfx] [PATCH 24/24] drm/i915: Add ww locking to pin_to_display_plane
[Intel-gfx] [i915] flip_done timed out errors with i7-1065G7 on kernel > 4.19
2020-08-12 12:54 UTC
[Intel-gfx] [PULL] drm-misc-fixes
2020-08-12 13:24 UTC
[Intel-gfx] [PULL] drm-intel-next-fixes
2020-08-12 12:49 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/gt:fix raw-wakeref not held calltrace in vGPU
2020-08-12 2:06 UTC (10+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] [PATCH] drm/i915: Drop runtime-pm assert from vgpu io accessors
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt:fix raw-wakeref not held calltrace in vGPU (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [RFC 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
2020-08-12 0:14 UTC (36+ messages)
` [Intel-gfx] [RFC 01/20] drm/nouveau/kms: Fix some indenting in nouveau_dp_detect()
` [Intel-gfx] [RFC 02/20] drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc()
` [Intel-gfx] [RFC 03/20] drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c
` [Intel-gfx] [RFC 04/20] drm/nouveau/kms/nv50-: Use macros for DP registers "
` [Intel-gfx] [RFC 05/20] drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new()
` [Intel-gfx] [RFC 06/20] drm/nouveau/kms: Search for encoders' connectors properly
` [Intel-gfx] [RFC 07/20] drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in nv50_sor_disable()
` [Intel-gfx] [RFC 08/20] drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling
` [Intel-gfx] [RFC 09/20] drm/i915/dp: Extract drm_dp_has_mst()
` [Intel-gfx] [RFC 10/20] drm/nouveau/kms: Use new drm_dp_has_mst() helper for checking MST caps
` [Intel-gfx] [RFC 11/20] drm/nouveau/kms: Move drm_dp_cec_unset_edid() into nouveau_connector_detect()
` [Intel-gfx] [RFC 12/20] drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths
` [Intel-gfx] [RFC 13/20] drm/i915/dp: Extract drm_dp_downstream_read_info()
` [Intel-gfx] [RFC 14/20] drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation
` [Intel-gfx] [RFC 15/20] drm/i915/dp: Extract drm_dp_has_sink_count()
` [Intel-gfx] [RFC 16/20] drm/i915/dp: Extract drm_dp_get_sink_count()
` [Intel-gfx] [RFC 17/20] drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT
` [Intel-gfx] [RFC 18/20] drm/nouveau/kms: Don't change EDID when it hasn't actually changed
` [Intel-gfx] [RFC 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps()
` [Intel-gfx] [RFC 20/20] drm/nouveau/kms: Start using drm_dp_read_dpcd_caps()
` [Intel-gfx] [Nouveau] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v6 01/11] HAX to make DSC work on the icelake test system
2020-08-11 20:15 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,01/11] HAX to make DSC work on the icelake test system (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [drm-intel:drm-intel-next-queued 27/28] drivers/gpu/drm/i915/gt/gen6_ppgtt.c:263:6-8: ERROR: iterator variable bound on line 262 cannot be NULL
2020-08-11 19:41 UTC (2+ messages)
` [Intel-gfx] [PATCH] drm/i915/gt: fix itnull.cocci warnings
[Intel-gfx] [PATCH CI 1/2] drm/i915: Initial implementation of PSR2 selective fetch
2020-08-11 16:20 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Initial implementation of PSR2 selective fetch (rev2)
[Intel-gfx] [PATCH] drm/i915/kbl: Fix revision ID checks
2020-08-11 16:18 UTC (6+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/kbl: Fix revision ID checks (rev2)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/kbl: Fix revision ID checks (rev3)
[Intel-gfx] [PATCH] drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock
2020-08-11 15:47 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] i915/gem: Force HW tracking to exit PSR
2020-08-11 11:27 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915/gem: Force HW tracking to exit PSR (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [RFC 00/60] DG1 LMEM enabling
2020-08-11 10:48 UTC (3+ messages)
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