messages from 2020-09-15 17:37:11 to 2020-09-17 11:31:33 UTC [more...]
[Intel-gfx] [patch 00/13] preempt: Make preempt count unconditional
2020-09-17 7:52 UTC (28+ messages)
` [Intel-gfx] [patch 03/13] preempt: Clenaup PREEMPT_COUNT leftovers
` [Intel-gfx] [patch 04/13] lockdep: "
` [Intel-gfx] [patch 06/13] locking/bitspinlock: "
` [Intel-gfx] [patch 08/13] sched: "
[Intel-gfx] [PATCH v2 00/21] Convert all remaining drivers to GEM object functions
2020-09-17 11:31 UTC (34+ messages)
` [Intel-gfx] [PATCH v2 01/21] drm/amdgpu: Introduce "
` [Intel-gfx] [PATCH v2 03/21] drm/etnaviv: "
` [Intel-gfx] [PATCH v2 04/21] drm/exynos: "
` [Intel-gfx] [PATCH v2 05/21] drm/gma500: "
` [Intel-gfx] [PATCH v2 07/21] drm/mediatek: "
` [Intel-gfx] [PATCH v2 08/21] drm/msm: Introduce GEM object funcs
` [Intel-gfx] [PATCH v2 09/21] drm/nouveau: Introduce GEM object functions
` [Intel-gfx] [PATCH v2 13/21] drm/rockchip: Convert to drm_gem_object_funcs
` [Intel-gfx] [PATCH v2 14/21] drm/tegra: Introduce GEM object functions
` [Intel-gfx] [PATCH v2 17/21] drm/virtgpu: Set PRIME export function in struct drm_gem_object_funcs
` [Intel-gfx] [PATCH v2 18/21] drm/vkms: Introduce GEM object functions
` [Intel-gfx] [PATCH v2 20/21] drm/xlnx: Initialize DRM driver instance with CMA helper macro
` [Intel-gfx] [PATCH v2 21/21] drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver
[Intel-gfx] [V12 0/4] Add support for mipi dsi cmd mode
2020-09-17 11:31 UTC (7+ messages)
` [Intel-gfx] [V12 1/4] drm/i915/dsi: Add details about TE in get_config
` [Intel-gfx] [V12 2/4] i915/dsi: Configure TE interrupt for cmd mode
` [Intel-gfx] [V12 3/4] drm/i915/dsi: Add TE handler for dsi "
` [Intel-gfx] [V12 4/4] drm/i915/dsi: Initiate fame request in "
` [Intel-gfx] ✓ Fi.CI.BAT: success for Add support for mipi dsi cmd mode (rev12)
[Intel-gfx] [RFC PATCH 0/2] Introduce a ww transaction utility
2020-09-17 11:29 UTC (4+ messages)
` [Intel-gfx] [RFC PATCH 1/2] drm/i915: Break out dma_resv ww locking utilities to separate files
` [Intel-gfx] [RFC PATCH 2/2] drm/i915: Introduce a i915_gem_do_ww(){} utility
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce a ww transaction utility
[Intel-gfx] [PATCH v2] drm/i915: Fix an error code i915_gem_object_copy_blt()
2020-09-17 10:49 UTC (2+ messages)
[Intel-gfx] [PULL] drm-intel-fixes
2020-09-17 8:45 UTC
[Intel-gfx] [PULL] gvt-fixes
2020-09-17 6:42 UTC
[Intel-gfx] [PATCH 00/12] drm/i915/guc: Update to GuC v49
2020-09-17 6:48 UTC (24+ messages)
` [Intel-gfx] [PATCH 01/12] drm/i915/guc: New GuC IDs based on engine class and instance
` [Intel-gfx] [PATCH 02/12] drm/i915/guc: Support logical engine mapping table in ADS
` [Intel-gfx] [PATCH 03/12] drm/i915/guc: Setup private_data pointer in GuC ADS
` [Intel-gfx] [PATCH 04/12] drm/i915/guc: Remove GUC_CTL_CTXINFO init param
` [Intel-gfx] [PATCH 05/12] drm/i915/guc: Kill guc_ads.reg_state_buffer
` [Intel-gfx] [PATCH 06/12] drm/i915/guc: ADS changes for GuC v42
` [Intel-gfx] [PATCH 07/12] drm/i915/guc: Setup doorbells data in ADS
` [Intel-gfx] [PATCH 08/12] drm/i915/guc: Increased engine classes "
` [Intel-gfx] [PATCH 09/12] drm/i915/guc: Update firmware to v49.0.1
` [Intel-gfx] [PATCH 10/12] drm/i915/guc: Improved reporting when GuC fails to load
` [Intel-gfx] [PATCH 11/12] drm/i915/guc: Clear pointers on free
` [Intel-gfx] [PATCH 12/12] drm/i915/uc: turn on GuC/HuC auto mode by default
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC v49
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [RFC v2 0/8] drm/i915: Add support for Intel's eDP backlight controls
2020-09-16 22:45 UTC (12+ messages)
` [Intel-gfx] [RFC v2 1/8] drm/i915/dp: Program source OUI on eDP panels
` [Intel-gfx] [RFC v2 2/8] drm/i915: Rename pwm_* backlight callbacks to ext_pwm_*
` [Intel-gfx] [RFC v2 3/8] drm/i915: Keep track of pwm-related backlight hooks separately
` [Intel-gfx] [RFC v2 4/8] drm/i915/dp: Rename eDP VESA backlight interface functions
` [Intel-gfx] [RFC v2 5/8] drm/i915/dp: Add register definitions for Intel HDR backlight interface
` [Intel-gfx] [RFC v2 6/8] drm/i915/dp: Enable Intel's HDR backlight interface (only SDR for now)
` [Intel-gfx] [RFC v2 7/8] drm/i915/dp: Allow forcing specific interfaces through enable_dpcd_backlight
` [Intel-gfx] [RFC v2 8/8] drm/dp: Revert "drm/dp: Introduce EDID-based quirks"
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for Intel's eDP backlight controls (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v9 0/8] Asynchronous flip implementation for i915
2020-09-16 21:27 UTC (13+ messages)
` [Intel-gfx] [PATCH v9 1/8] drm/i915: Add enable/disable flip done and flip done handler
` [Intel-gfx] [PATCH v9 2/8] drm/i915: Add support for async flips in I915
` [Intel-gfx] [PATCH v9 3/8] drm/i915: Add checks specific to async flips
` [Intel-gfx] [PATCH v9 4/8] drm/i915: Do not call drm_crtc_arm_vblank_event in "
` [Intel-gfx] [PATCH v9 5/8] drm/i915: Add dedicated plane hook for async flip case
` [Intel-gfx] [PATCH v9 6/8] drm/i915: WA for platforms with double buffered address update enable bit
` [Intel-gfx] [PATCH v9 7/8] Documentation/gpu: Add asynchronous flip documentation for i915
` [Intel-gfx] [PATCH v9 8/8] drm/i915: Enable async flips in i915
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Asynchronous flip implementation for i915 (rev9)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9
2020-09-16 19:59 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register lookup
2020-09-16 19:17 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4)
[Intel-gfx] [CI 1/2] drm/i915: Initialise outparam for error return from wait_for_register
2020-09-16 19:07 UTC (6+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/selftests: Push the fake iommu device from the stack to data
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Initialise outparam for error return from wait_for_register
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
2020-09-16 18:05 UTC (4+ messages)
` [Intel-gfx] [PATCH v2 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase
` [Intel-gfx] [PATCH v2 3/3] drm/i915/display: Program PSR2 selective fetch registers
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
[Intel-gfx] [PATCH 1/3] drm/i915/gt: Signal cancelled requests
2020-09-16 18:01 UTC (9+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/selftests: Finish pending mock requests on cancellation
` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Retire cancelled requests on unload
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/gt: Signal cancelled requests
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/3] drm/i915/gt: Show engine properties in the pretty printer
2020-09-16 17:51 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Break up error capture compression loops with cond_resched()
` [Intel-gfx] [PATCH 3/3] drm/i915: Reduce GPU error capture mutex hold time
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gt: Show engine properties in the pretty printer
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/4] drm/i915/gem: Hold request reference for canceling an active context
2020-09-16 17:19 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915: Cancel outstanding work after disabling heartbeats on an engine
` [Intel-gfx] [PATCH 3/4] drm/i915/gt: Always send a pulse down the engine after disabling heartbeat
` [Intel-gfx] [PATCH 4/4] drm/i915/gem: Always test execution status on closing the context
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/gem: Hold request reference for canceling an active context
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v8 0/8] Asynchronous flip implementation for i915
2020-09-16 15:52 UTC (22+ messages)
` [Intel-gfx] [PATCH v8 1/8] drm/i915: Add enable/disable flip done and flip done handler
` [Intel-gfx] [PATCH v8 2/8] drm/i915: Add support for async flips in I915
` [Intel-gfx] [PATCH v8 3/8] drm/i915: Add checks specific to async flips
` [Intel-gfx] [PATCH v8 4/8] drm/i915: Do not call drm_crtc_arm_vblank_event in "
` [Intel-gfx] [PATCH v8 5/8] drm/i915: Add dedicated plane hook for async flip case
` [Intel-gfx] [PATCH v8 6/8] drm/i915: WA for platforms with double buffered adress update enable bit
[Intel-gfx] [RFC 0/5] drm/i915: Add support for Intel's eDP backlight controls
2020-09-16 15:32 UTC (17+ messages)
` [Intel-gfx] [RFC 1/5] drm/i915/dp: Program source OUI on eDP panels
` [Intel-gfx] [RFC 2/5] drm/i915: Rename pwm_* backlight callbacks to ext_pwm_*
` [Intel-gfx] [RFC 4/5] drm/i915: Enable Intel's HDR backlight interface (only SDR for now)
` [Intel-gfx] [RFC 5/5] drm/dp: Revert "drm/dp: Introduce EDID-based quirks"
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for Intel's eDP backlight controls
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/3] dma-buf: Flag vmap'ed memory as system or I/O memory
2020-09-16 13:12 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/3] dma-buf: Use struct dma_buf_map in dma_buf_vmap() interfaces
[Intel-gfx] Fixes that failed to apply to v5.9-rc5
2020-09-16 8:49 UTC
[Intel-gfx] [PATCH 1/4] drm/i915/gt: Widen CSB pointer to u64 for the parsers
2020-09-16 8:35 UTC (5+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915/gt: Wait for CSB entries on Tigerlake
[Intel-gfx] [PATCH 3/3] drm/i915/gem: Serialise debugfs i915_gem_objects with ctx->mutex
2020-09-16 8:27 UTC (3+ messages)
[Intel-gfx] [PATCH i-g-t v6 00/24] tests/core_hotunplug: Fixes and enhancements
2020-09-16 7:59 UTC (7+ messages)
[Intel-gfx] [PATCH 4/4] drm/i915: Nuke force_min_cdclk_changed
2020-09-16 7:46 UTC
[Intel-gfx] [V11 0/4] Add support for mipi dsi cmd mode
2020-09-16 7:45 UTC (8+ messages)
` [Intel-gfx] [V11 1/4] drm/i915/dsi: Add details about TE in get_config
` [Intel-gfx] [V11 2/4] i915/dsi: Configure TE interrupt for cmd mode
` [Intel-gfx] [V11 3/4] drm/i915/dsi: Add TE handler for dsi "
` [Intel-gfx] [V11 4/4] drm/i915/dsi: Initiate fame request in "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev11)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Remove the old global state stuff
2020-09-16 7:44 UTC (2+ messages)
[Intel-gfx] [PATCH v2] drm/i915/display: Add max plane width for NV12 AUX plane for Gen10+ platforms
2020-09-16 7:35 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add max plane width for NV12 AUX plane for Gen10+ platforms (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [V10 0/4] Add support for mipi dsi cmd mode
2020-09-16 5:28 UTC (6+ messages)
` [Intel-gfx] [V10 1/4] drm/i915/dsi: Add details about TE in get_config
` [Intel-gfx] [V10 2/4] i915/dsi: Configure TE interrupt for cmd mode
` [Intel-gfx] [V10 3/4] drm/i915/dsi: Add TE handler for dsi "
` [Intel-gfx] [V10 4/4] drm/i915/dsi: Initiate fame request in "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Add support for mipi dsi cmd mode (rev10)
[Intel-gfx] [PATCH 1/2] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
2020-09-16 3:25 UTC (3+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/display: Check PSR parameter and flag only in state compute phase
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
[Intel-gfx] [PATCH 1/4] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
2020-09-16 2:44 UTC (13+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915/display: Fix state of PSR2 sub features
` [Intel-gfx] [PATCH 3/4] drm/i915/display: Program PSR2 selective fetch registers
[Intel-gfx] [CI] PR for new v49.0.1 GuC binaries
2020-09-16 1:02 UTC
[Intel-gfx] [PATCH v6 08/11] drm/i915: Link planes in a bigjoiner configuration, v3
2020-09-15 23:03 UTC (14+ messages)
` [Intel-gfx] [PATCH v6 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3
[Intel-gfx] [CI 1/4] drm/i915/gt: Widen CSB pointer to u64 for the parsers
2020-09-15 19:53 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/4] "
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