messages from 2020-09-16 20:29:21 to 2020-09-20 06:41:08 UTC [more...]
[Intel-gfx] [patch RFC 00/15] mm/highmem: Provide a preemptible variant of kmap_atomic & friends
2020-09-20 6:41 UTC (27+ messages)
` [Intel-gfx] [patch RFC 01/15] mm/highmem: Un-EXPORT __kmap_atomic_idx()
` [Intel-gfx] [patch RFC 02/15] highmem: Provide generic variant of kmap_atomic*
` [Intel-gfx] [patch RFC 03/15] x86/mm/highmem: Use generic kmap atomic implementation
` [Intel-gfx] [patch RFC 04/15] arc/mm/highmem: "
` [Intel-gfx] [patch RFC 05/15] ARM: highmem: Switch to generic kmap atomic
` [Intel-gfx] [patch RFC 06/15] csky/mm/highmem: "
` [Intel-gfx] [patch RFC 07/15] microblaze/mm/highmem: "
` [Intel-gfx] [patch RFC 08/15] mips/mm/highmem: "
` [Intel-gfx] [patch RFC 09/15] nds32/mm/highmem: "
` [Intel-gfx] [patch RFC 10/15] powerpc/mm/highmem: "
` [Intel-gfx] [patch RFC 11/15] sparc/mm/highmem: "
` [Intel-gfx] [patch RFC 12/15] xtensa/mm/highmem: "
` [Intel-gfx] [patch RFC 13/15] mm/highmem: Remove the old kmap_atomic cruft
` [Intel-gfx] [patch RFC 14/15] sched: highmem: Store temporary kmaps in task struct
` [Intel-gfx] [patch RFC 15/15] mm/highmem: Provide kmap_temporary*
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for mm/highmem: Provide a preemptible variant of kmap_atomic & friends
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3 0/6] Convert the intel iommu driver to the dma-iommu api
2020-09-20 6:36 UTC (3+ messages)
[Intel-gfx] [PATCH 0/4] managed drm_device, absolute final leftover bits
2020-09-19 15:29 UTC (22+ messages)
` [Intel-gfx] [PATCH 1/4] drm/i915/selftest: Create mock_destroy_device
` [Intel-gfx] [PATCH 2/4] drm/i915/selftests: align more to real device lifetimes
` [Intel-gfx] [PATCH] "
` [Intel-gfx] [PATCH 3/4] drm/amdgpu: Convert to using devm_drm_dev_alloc() (v2)
` [Intel-gfx] [PATCH 4/4] drm/dev: Remove drm_dev_init
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for managed drm_device, absolute final leftover bits
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for managed drm_device, absolute final leftover bits (rev2)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for managed drm_device, absolute final leftover bits (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] PR for new v49.0.1 GuC binaries
2020-09-18 19:01 UTC
[Intel-gfx] [PATCH 1/3] drm/i915: Extract intel_dp_output_format()
2020-09-18 18:49 UTC (14+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Decouple intel_dp_{min, output}_bpp() from crtc_state
` [Intel-gfx] [PATCH 3/3] drm/i915: Use the correct bpp when validating "4:2:0 only" modes
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/3] drm/i915: Extract intel_dp_output_format()
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Extract intel_dp_output_format() (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v3 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
2020-09-18 18:46 UTC (7+ messages)
` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase
` [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Program PSR2 selective fetch registers
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] i915: Introduce quirk for shifting eDP brightness
2020-09-18 18:15 UTC (17+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PULL] drm-intel-next
2020-09-18 17:30 UTC
[Intel-gfx] [patch 00/13] preempt: Make preempt count unconditional
2020-09-17 16:28 UTC (19+ messages)
[Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
2020-09-17 19:40 UTC (4+ messages)
` [Intel-gfx] [oss-drivers] "
[Intel-gfx] [PATCH] drm/i915: Fix uninitialised variable in intel_context_create_request
2020-09-18 17:19 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] remove alloc_vm_area
2020-09-18 17:03 UTC (8+ messages)
` [Intel-gfx] [PATCH 1/6] zsmalloc: switch from alloc_vm_area to get_vm_area
` [Intel-gfx] [PATCH 2/6] mm: add a vmap_pfn function
` [Intel-gfx] [PATCH 3/6] drm/i915: use vmap in shmem_pin_map
` [Intel-gfx] [PATCH 4/6] drm/i915: use vmap in i915_gem_object_map
` [Intel-gfx] [PATCH 5/6] xen/xenbus: use apply_to_page_range directly in xenbus_map_ring_pv
` [Intel-gfx] [PATCH 6/6] x86/xen: open code alloc_vm_area in arch_gnttab_valloc
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/6] zsmalloc: switch from alloc_vm_area to get_vm_area
[Intel-gfx] [PATCH v9 0/8] Asynchronous flip implementation for i915
2020-09-18 12:17 UTC (15+ messages)
` [Intel-gfx] [PATCH v9 6/8] drm/i915: WA for platforms with double buffered address update enable bit
` [Intel-gfx] [PATCH v9 7/8] Documentation/gpu: Add asynchronous flip documentation for i915
` [Intel-gfx] [PATCH v9 8/8] drm/i915: Enable async flips in i915
` [Intel-gfx] ✗ Fi.CI.IGT: failure for Asynchronous flip implementation for i915 (rev9)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Asynchronous flip implementation for i915 (rev10)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Asynchronous flip implementation for i915 (rev11)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v9 5/8] drm/i915: Add dedicated plane hook for async flip case
2020-09-18 11:53 UTC (3+ messages)
` [Intel-gfx] [PATCH v10 "
[Intel-gfx] [PATCH v9 3/8] drm/i915: Add checks specific to async flips
2020-09-18 11:51 UTC (3+ messages)
` [Intel-gfx] [PATCH v10 "
[Intel-gfx] [PATCH] drm/i915/uc: tune down GuC communication enabled/disabled messages
2020-09-18 11:34 UTC (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: tune down GuC communication enabled/disabled messages (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PULL] drm-misc-fixes
2020-09-18 11:11 UTC
[Intel-gfx] [PATCH 0/3] dma-buf: Flag vmap'ed memory as system or I/O memory
2020-09-18 8:32 UTC (3+ messages)
[Intel-gfx] [PULL] drm-misc-next
2020-09-18 8:11 UTC
[Intel-gfx] [PATCH] drm/i915/dp: Tweak initial dpcd backlight.enabled value
2020-09-18 2:58 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 01/20] drm/i915: Fix state checker hw.active/hw.enable readout
2020-09-17 21:52 UTC (19+ messages)
` [Intel-gfx] [PATCH 02/20] drm/i915: Move MST master transcoder dump earlier
` [Intel-gfx] [PATCH 03/20] drm/i915: Include the LUT sizes in the state dump
` [Intel-gfx] [PATCH 04/20] drm/i915: s/glk_read_lut_10/bdw_read_lut_10/
` [Intel-gfx] [PATCH 05/20] drm/i915: Reset glk degamma index after programming/readout
` [Intel-gfx] [PATCH 06/20] drm/i915: Shuffle chv_cgm_gamma_pack() around a bit
` [Intel-gfx] [PATCH 07/20] drm/i915: Relocate CHV CGM gamma masks
` [Intel-gfx] [PATCH 08/20] drm/i915: Add glk+ degamma readout
` [Intel-gfx] [PATCH 09/20] drm/i915: Read out CHV CGM degamma
` [Intel-gfx] [PATCH 10/20] drm/i915: Add gamma/degamma readout for bdw+
` [Intel-gfx] [PATCH 11/20] drm/i915: Do degamma+gamma readout in bdw+ split gamma mode
` [Intel-gfx] [PATCH 12/20] drm/i915: Polish bdw_read_lut_10() a bit
` [Intel-gfx] [PATCH 13/20] drm/i915: Add gamma/degamm readout for ivb/hsw
` [Intel-gfx] [PATCH 14/20] drm/i915: Replace some gamma_mode ifs with switches
` [Intel-gfx] [PATCH 15/20] drm/i915: Make ilk_load_luts() deal with degamma
` [Intel-gfx] [PATCH 16/20] drm/i915: Make ilk_read_luts() capable of degamma readout
` [Intel-gfx] [PATCH 17/20] drm/i915: Make .read_luts() mandatory
` [Intel-gfx] [PATCH 18/20] drm/i915: Extract ilk_crtc_has_gamma() & co
` [Intel-gfx] [PATCH 19/20] drm/i915: Complete the gamma/degamma state checking
[Intel-gfx] [RFC PATCH v2 0/2] Introduce a ww transaction utility
2020-09-17 19:16 UTC (4+ messages)
` [Intel-gfx] [RFC PATCH v2 1/2] drm/i915: Break out dma_resv ww locking utilities to separate files
` [Intel-gfx] [RFC PATCH v2 2/2] drm/i915: Introduce a i915_gem_do_ww(){} utility
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce a ww transaction utility (rev2)
[Intel-gfx] [PATCH v5 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
2020-09-17 16:45 UTC (3+ messages)
` [Intel-gfx] [PATCH v5 14/20] drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation
[Intel-gfx] [PATCH v2 00/18] drm/i915: Pimp DP DFP handling
2020-09-17 16:11 UTC (6+ messages)
` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock()
[Intel-gfx] [PATCH v2] drm/i915: Fix the race between the GEM close and debugfs
2020-09-17 15:53 UTC (2+ messages)
[Intel-gfx] [PATCH 1/4] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
2020-09-17 14:05 UTC (7+ messages)
` [Intel-gfx] [PATCH 3/4] drm/i915/display: Program PSR2 selective fetch registers
[Intel-gfx] [PATCH v2 00/21] Convert all remaining drivers to GEM object functions
2020-09-17 14:01 UTC (12+ messages)
` [Intel-gfx] [PATCH v2 01/21] drm/amdgpu: Introduce "
` [Intel-gfx] [PATCH v2 14/21] drm/tegra: "
` [Intel-gfx] [PATCH v2 16/21] drm/vgem: "
` [Intel-gfx] [PATCH v2 18/21] drm/vkms: "
[Intel-gfx] [PATCH] dma-resv: lockdep-prime address_space->i_mmap_rwsem for dma-resv
2020-09-17 13:19 UTC (2+ messages)
[Intel-gfx] [V12 0/4] Add support for mipi dsi cmd mode
2020-09-17 13:01 UTC (6+ messages)
` [Intel-gfx] [V12 4/4] drm/i915/dsi: Initiate fame request in "
[Intel-gfx] [PATCH 1/2] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
2020-09-17 12:27 UTC (3+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/display: Check PSR parameter and flag only in state compute phase
[Intel-gfx] [PATCH v6 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3
2020-09-17 12:20 UTC (7+ messages)
[Intel-gfx] [RFC PATCH 0/2] Introduce a ww transaction utility
2020-09-17 11:29 UTC (4+ messages)
` [Intel-gfx] [RFC PATCH 1/2] drm/i915: Break out dma_resv ww locking utilities to separate files
` [Intel-gfx] [RFC PATCH 2/2] drm/i915: Introduce a i915_gem_do_ww(){} utility
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce a ww transaction utility
[Intel-gfx] [PATCH v2] drm/i915: Fix an error code i915_gem_object_copy_blt()
2020-09-17 10:49 UTC (2+ messages)
[Intel-gfx] [PULL] drm-intel-fixes
2020-09-17 8:45 UTC
[Intel-gfx] [PULL] gvt-fixes
2020-09-17 6:42 UTC
[Intel-gfx] [PATCH 00/12] drm/i915/guc: Update to GuC v49
2020-09-17 6:48 UTC (15+ messages)
` [Intel-gfx] [PATCH 02/12] drm/i915/guc: Support logical engine mapping table in ADS
` [Intel-gfx] [PATCH 03/12] drm/i915/guc: Setup private_data pointer in GuC ADS
` [Intel-gfx] [PATCH 04/12] drm/i915/guc: Remove GUC_CTL_CTXINFO init param
` [Intel-gfx] [PATCH 05/12] drm/i915/guc: Kill guc_ads.reg_state_buffer
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Update to GuC v49
[Intel-gfx] [RFC v2 0/8] drm/i915: Add support for Intel's eDP backlight controls
2020-09-16 22:45 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add support for Intel's eDP backlight controls (rev2)
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