messages from 2020-10-13 12:18:28 to 2020-10-15 11:26:56 UTC [more...]
[Intel-gfx] [PATCH v3 00/63] drm/i915: Remove obj->mm.lock!
2020-10-15 11:26 UTC (25+ messages)
` [Intel-gfx] [PATCH v3 01/63] drm/i915: Move cmd parser pinning to execbuffer
` [Intel-gfx] [PATCH v3 02/63] drm/i915: Add missing -EDEADLK handling to execbuf pinning
` [Intel-gfx] [PATCH v3 03/63] drm/i915: Do not share hwsp across contexts any more, v3
` [Intel-gfx] [PATCH v3 04/63] drm/i915: Pin timeline map after first timeline pin, v3
` [Intel-gfx] [PATCH v3 06/63] drm/i915: Add gem object locking to madvise
` [Intel-gfx] [PATCH v3 07/63] drm/i915: Move HAS_STRUCT_PAGE to obj->flags
` [Intel-gfx] [PATCH v3 08/63] drm/i915: Rework struct phys attachment handling
` [Intel-gfx] [PATCH v3 10/63] drm/i915: make lockdep slightly happier about execbuf
` [Intel-gfx] [PATCH v3 11/63] drm/i915: Disable userptr pread/pwrite support
` [Intel-gfx] [PATCH v3 12/63] drm/i915: No longer allow exporting userptr through dma-buf
` [Intel-gfx] [PATCH v3 13/63] drm/i915: Reject more ioctls for userptr
` [Intel-gfx] [PATCH v3 14/63] drm/i915: Reject UNSYNCHRONIZED "
` [Intel-gfx] [PATCH v3 16/63] drm/i915: Flatten obj->mm.lock
` [Intel-gfx] [PATCH v3 17/63] drm/i915: Populate logical context during first pin
` [Intel-gfx] [PATCH v3 19/63] drm/i915: Handle ww locking in init_status_page
` [Intel-gfx] [PATCH v3 21/63] drm/i915: Pass ww ctx to intel_pin_to_display_plane
` [Intel-gfx] [PATCH v3 25/63] drm/i915: Make intel_init_workaround_bb more compatible with ww locking
` [Intel-gfx] [PATCH v3 27/63] drm/i915: Take obj lock around set_domain ioctl
` [Intel-gfx] [PATCH v3 28/63] drm/i915: Defer pin calls in buffer pool until first use by caller
` [Intel-gfx] [PATCH v3 30/63] drm/i915: Fix workarounds selftest, part 1
` [Intel-gfx] [PATCH v3 33/63] drm/i915: Add ww locking around vm_access()
` [Intel-gfx] [PATCH v3 45/63] drm/i915/selftests: Prepare execbuf tests for obj->mm.lock removal
` [Intel-gfx] [PATCH v3 48/63] drm/i915/selftests: Prepare object blit "
` [Intel-gfx] [PATCH v3 60/63] drm/i915: Finally remove obj->mm.lock
[Intel-gfx] [PATCH] drm/i915/jsl: Remove require_force_probe protection
2020-10-15 11:04 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [RFC 00/13] Add support for DP-HDMI2.1 PCON
2020-10-15 10:52 UTC (14+ messages)
` [Intel-gfx] [RFC 01/13] drm/edid: Add additional HFVSDB fields for HDMI2.1
` [Intel-gfx] [RFC 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block
` [Intel-gfx] [RFC 03/13] drm/dp_helper: Add FRL training support for a DP-HDMI2.1 PCON
` [Intel-gfx] [RFC 04/13] drm/i915: Capture max frl rate for PCON in dfp cap structure
` [Intel-gfx] [RFC 05/13] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON
` [Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training
` [Intel-gfx] [RFC 07/13] drm/dp_helper: Add support for link status and link recovery
` [Intel-gfx] [RFC 08/13] drm/i915: Add support for enabling link status and recovery
` [Intel-gfx] [RFC 09/13] drm/edid: Parse DSC1.2 cap fields from HFVSDB block
` [Intel-gfx] [RFC 10/13] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon
` [Intel-gfx] [RFC 11/13] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder
` [Intel-gfx] [RFC 12/13] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1
` [Intel-gfx] [RFC 13/13] drm/i915: Configure PCON for DSC1.1 to DSC1.2 encoding
[Intel-gfx] [PATCH i-g-t] tests/core_hotunplug: Take care of closing fences before failing
2020-10-15 7:40 UTC (2+ messages)
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH] drm/i915/ehl: Remove require_force_probe protection
2020-10-15 8:41 UTC (9+ messages)
[Intel-gfx] [PATCH i-g-t] i915/sysfs: Verify .defaults are read-only and match their namesakes
2020-10-15 8:36 UTC
[Intel-gfx] [PATCH i-g-t v3] tests/core_hotunplug: Restore i915 debugfs health check
2020-10-15 7:15 UTC (2+ messages)
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [RFC i-g-t] intel_gpu_top: User friendly device listing
2020-10-15 8:09 UTC (5+ messages)
[Intel-gfx] [PATCH i-g-t 01/10] i915/gem_userptr_blits: Tighten has_userptr()
2020-10-15 4:58 UTC (13+ messages)
` [Intel-gfx] [PATCH i-g-t 02/10] i915/gem_exec_balancer: Check balancer submission latency
` [Intel-gfx] [PATCH i-g-t 03/10] i915/gen9_exec_parse: Check oversized batch with length==0
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 04/10] i915/gem_exec_schedule: Include userptr scheduling tests
` [Intel-gfx] [PATCH i-g-t 05/10] i915/gem_exec_balancer: Check interactions between bonds and userptr
` [Intel-gfx] [PATCH i-g-t 06/10] i915/gem_exec_reloc: Continuing the trend of checking userptr
` [Intel-gfx] [PATCH i-g-t 07/10] i915/gem_userptr_blits: Test execution isolation
` [Intel-gfx] [PATCH i-g-t 08/10] lib: Use unsigned gen for forward compatible tests
` [Intel-gfx] [PATCH i-g-t 09/10] tests/i915: Treat gen as unsigned for forward compatibility
` [Intel-gfx] [PATCH i-g-t 10/10] i915/gem_exec_schedule: Try to spot unfairness
[Intel-gfx] [CI 01/11] drm/i915/display: allow to skip certain power wells
2020-10-14 21:16 UTC (15+ messages)
` [Intel-gfx] [CI 02/11] drm/i915/cnl: skip PW_DDI_F on certain skus
` [Intel-gfx] [CI 03/11] drm/i915/dg1: Add DG1 power wells
` [Intel-gfx] [CI 04/11] drm/i915/dg1: Add DPLL macros for DG1
` [Intel-gfx] [CI 05/11] drm/i915/dg1: Add and setup DPLLs "
` [Intel-gfx] [CI 06/11] drm/i915/dg1: Enable DPLL "
` [Intel-gfx] [CI 07/11] drm/i915/dg1: Load DMC
` [Intel-gfx] [CI 08/11] drm/i915/dg1: Add initial DG1 workarounds
` [Intel-gfx] [CI 09/11] drm/i915/dg1: DG1 does not support DC6
` [Intel-gfx] [CI 10/11] drm/i915/dg1: Update DMC_DEBUG register
` [Intel-gfx] [CI 11/11] drm/i915/dgfx: define llc and snooping behaviour
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/11] drm/i915/display: allow to skip certain power wells
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] i915 dma faults on Xen
2020-10-14 19:28 UTC
[Intel-gfx] [PATCH v10 01/11] HAX to make DSC work on the icelake test system
2020-10-14 19:09 UTC (13+ messages)
` [Intel-gfx] [PATCH v10 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3
` [Intel-gfx] [PATCH v10 05/11] drm/i915: Try to make bigjoiner work in atomic check
` [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v10,01/11] HAX to make DSC work on the icelake test system (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gt: Fixup tgl mocs for PTE tracking
2020-10-14 18:20 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gt: Confirm the context survives execution
2020-10-14 17:39 UTC (9+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Confirm the context survives execution (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v7 00/15] Introduce DG1
2020-10-14 17:24 UTC (3+ messages)
` [Intel-gfx] [PATCH v7 05/15] drm/i915/dg1: Add and setup DPLLs for DG1
[Intel-gfx] [PATCH] drm/i915/edp/jsl: Update vswing table for HBR and HBR2
2020-10-14 16:07 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/edp/jsl: Update vswing table for HBR and HBR2 (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH 00/13] HDCP 2.2 DP MST Support
2020-10-14 16:03 UTC (18+ messages)
` [Intel-gfx] [PATCH 01/13] drm/i915/hdcp: Update CP property in update_pipe
` [Intel-gfx] [PATCH 02/13] drm/i915/hotplug: Handle CP_IRQ for DP-MST
` [Intel-gfx] [PATCH 03/13] drm/i915/hdcp: DP MST transcoder for link and stream
` [Intel-gfx] [PATCH 04/13] drm/i915/hdcp: Move HDCP enc status timeout to header
` [Intel-gfx] [PATCH 05/13] drm/i915/hdcp: HDCP stream encryption support
` [Intel-gfx] [PATCH 06/13] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support
` [Intel-gfx] [PATCH 07/13] drm/i915/hdcp: Pass dig_port to intel_hdcp_init
` [Intel-gfx] [PATCH 08/13] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port
` [Intel-gfx] [PATCH 09/13] drm/i915/hdcp: mst streams support in hdcp port_data
` [Intel-gfx] [PATCH 10/13] drm/i915/hdcp: Pass connector to check_2_2_link
` [Intel-gfx] [PATCH 11/13] drm/i915/hdcp: Add HDCP 2.2 stream register
` [Intel-gfx] [PATCH 12/13] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks
` [Intel-gfx] [PATCH 13/13] drm/i915/hdcp: Enable HDCP 2.2 MST support
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 DP MST Support (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v2 0/3] drm/i915/guc: Update to GuC v49
2020-10-14 15:44 UTC (8+ messages)
` [Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Update to use firmware v49.0.1
` [Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Improved reporting when GuC fails to load
` [Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Clear pointers on free
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC v49
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/6] drm/i915/display/psr: Calculate selective fetch plane registers
2020-10-14 15:36 UTC (10+ messages)
` [Intel-gfx] [PATCH 2/6] drm/i915/display/psr: Use plane damage clips to calculate damaged area
` [Intel-gfx] [PATCH 3/6] drm/i915/display/psr: Consider other planes to damaged area calculation
` [Intel-gfx] [PATCH 4/6] drm/i915/display: Split and export main surface calculation from skl_check_main_surface()
` [Intel-gfx] [PATCH 5/6] RFC/WIP: drm/i915/display/psr: Consider tiling when doing the plane offset calculation
` [Intel-gfx] [PATCH 6/6] DEBUG: drm/i915/display: Add debug information to selective fetch
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/display/psr: Calculate selective fetch plane registers
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH V2] drm/i915/jsl: Split EHL/JSL platform info and PCI ids
2020-10-14 14:40 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/jsl: Split EHL/JSL platform info and PCI ids (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/3] drm/i915: Mark ininitial fb obj as WT on eLLC machines to avoid rcu lockup during fbdev init
2020-10-14 14:23 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Fix MOCS PTE setting for gen9+
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Mark ininitial fb obj as WT on eLLC machines to avoid rcu lockup during fbdev init (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/3] drm/i915: Reorder hpd init vs. display resume
2020-10-14 14:14 UTC (8+ messages)
` [Intel-gfx] [PATCH v2 "
` [Intel-gfx] [PATCH v3 "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/3] drm/i915: Reorder hpd init vs. display resume (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 2/2] drm/i915/dp: use opregion mailbox #5 EDID for eDP, if available
2020-10-14 14:14 UTC (6+ messages)
[Intel-gfx] [PATCH i-g-t] i915/gem_uesrptr_blits: Tighten has_userptr()
2020-10-14 8:34 UTC
[Intel-gfx] [PATCH] drm/i915/execbuf: don't allow zero batch_len
2020-10-14 7:18 UTC (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Cleanup kasan warning for on-stack (unsigned long) casting
2020-10-14 7:07 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Make the GEM reclaim workqueue high priority
2020-10-14 3:19 UTC (7+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/psr: Configure and Program IO buffer Wake and Fast Wake
2020-10-13 23:41 UTC (2+ messages)
[Intel-gfx] [PATCH RFC PKS/PMEM 00/58] PMEM: Introduce stray write protection for PMEM
2020-10-13 20:52 UTC (12+ messages)
` [Intel-gfx] [PATCH RFC PKS/PMEM 24/58] fs/freevxfs: Utilize new kmap_thread()
` [Intel-gfx] [PATCH RFC PKS/PMEM 33/58] fs/cramfs: "
[Intel-gfx] [CI] drm/i915/gem: Poison stolen pages before use
2020-10-13 23:31 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Poison stolen pages before use (rev2)
[Intel-gfx] [PATCH i-g-t] i915/gem_exec_balancer: Check balancer submission latency
2020-10-13 17:07 UTC
[Intel-gfx] [PATCH] tests/gem_exec_params: test overly large batch
2020-10-13 14:40 UTC (4+ messages)
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH v6 0/5] Introduce drm scaling filter property
2020-10-13 14:26 UTC (2+ messages)
[Intel-gfx] [PATCH i-g-t] i915/gen9_exec_parse: Check oversized batch with length==0
2020-10-13 14:22 UTC
[Intel-gfx] linux-next: build failure after merge of the drm-misc tree
2020-10-13 11:12 UTC (7+ messages)
` [Intel-gfx] [PATCH] drm/ingenic: Fix bad revert
[Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings
2020-10-13 11:53 UTC
[Intel-gfx] [Regression] "drm/i915: Implement display w/a #1143" breaks HDMI on ASUS GL552VW
2020-10-13 12:25 UTC (14+ messages)
[Intel-gfx] [PATCH 0/2] HDCP over DP-MST misc
2020-10-13 12:24 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for HDCP over DP-MST misc (rev2)
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