messages from 2021-09-29 18:01:47 to 2021-10-01 09:51:04 UTC [more...]
[Intel-gfx] [PULL] drm-misc-fixes
2021-10-01 9:50 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
2021-10-01 9:40 UTC (3+ messages)
[Intel-gfx] [PATCH 0/2] drm/i915/gt: Locking splats PREEMPT_RT
2021-10-01 9:29 UTC (4+ messages)
` [Intel-gfx] [RFC PATCH 2/2] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
[Intel-gfx] [PATCH] drm/locking: add backtrace for locking contended locks without backoff
2021-10-01 9:16 UTC (4+ messages)
` [Intel-gfx] [PATCH v2] "
[Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE
2021-10-01 9:11 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [RFC 0/6] CPU + GPU synchronised priority scheduling
2021-10-01 9:04 UTC (11+ messages)
` [Intel-gfx] [RFC 1/6] sched: Add nice value change notifier
` [Intel-gfx] [RFC 2/6] drm/i915: Explicitly track DRM clients
` [Intel-gfx] [RFC 3/6] drm/i915: Make GEM contexts "
` [Intel-gfx] [RFC 4/6] drm/i915: Track all user contexts per client
` [Intel-gfx] [RFC 5/6] drm/i915: Keep track of registered clients indexed by task struct
` [Intel-gfx] [RFC 6/6] drm/i915: Connect task and GPU scheduling priorities
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for CPU + GPU synchronised priority scheduling
[Intel-gfx] [PATCH] drm/i915/fdi: use -EAGAIN instead of local special return value
2021-10-01 8:55 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/6] drm/i915: incidental -EPERM considered harmful
2021-10-01 8:50 UTC (12+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915/dsi: pass struct mipi_dsi_packet pointer, not the entire struct
` [Intel-gfx] [PATCH 2/6] drm/i915/dsi: fuse dsi_send_pkt_payld() and add_payld_to_queue()
` [Intel-gfx] [PATCH 3/6] drm/i915/dsi: return -EBUSY instead of -1
` [Intel-gfx] [PATCH 4/6] drm/i915/hdmi: return -EINVAL "
` [Intel-gfx] [PATCH 5/6] drm/i915/drv: return -EIO "
` [Intel-gfx] [PATCH 6/6] drm/i915/dram: return -ENOENT "
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: incidental -EPERM considered harmful
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: incidental -EPERM considered harmful (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/4] drm/i915/display: move modeset asserts out of intel_display.c
2021-10-01 8:49 UTC (11+ messages)
` [Intel-gfx] [PATCH 1/4] drm/i915/fdi: move fdi modeset asserts to intel_fdi.c
` [Intel-gfx] [PATCH 2/4] drm/i915/pps: move pps (panel) modeset asserts to intel_pps.c
` [Intel-gfx] [PATCH 3/4] drm/i915/dpll: move dpll modeset asserts to intel_dpll.c
` [Intel-gfx] [PATCH 4/4] drm/i915/dsi: move dsi pll modeset asserts to vlv_dsi_pll.c
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: move modeset asserts out of intel_display.c
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts
2021-10-01 8:40 UTC (2+ messages)
[Intel-gfx] [PATCH v3] drm/i915/ttm: Rework object initialization slightly
2021-10-01 8:33 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: Rework object initialization slightly (rev4)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 0/3] Rename IS_ACTIVE() and move to kconfig.h
2021-10-01 2:33 UTC (17+ messages)
` [Intel-gfx] [PATCH v2 1/3] drm/i915: rename IS_ACTIVE
` [Intel-gfx] [PATCH v2 2/3] drm/i915/utils: do not depend on config being defined
` [Intel-gfx] [PATCH v2 3/3] Move IS_CONFIG_NONZERO() to kconfig.h
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Rename IS_ACTIVE() and move "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v2] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe
2021-10-01 8:06 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Stop using I915_TILING_* in client blit selftest
2021-10-01 7:16 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/2] drm/i915: Extend the async flip VT-d w/a to skl/bxt
2021-10-01 2:40 UTC (5+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i195: Make the async flip VT-d workaround dynamic
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Extend the async flip VT-d w/a to skl/bxt
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gt: move remaining debugfs interfaces into gt
2021-10-01 0:12 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: move remaining debugfs interfaces into gt (rev7)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v4] drm/i915: Update memory bandwidth formulae
2021-09-30 22:53 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Update memory bandwidth formulae (rev4)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/27] Parallel submission aka multi-bb execbuf
2021-09-30 22:16 UTC (6+ messages)
` [Intel-gfx] [PATCH 24/27] drm/i915: Multi-BB execbuf
` [Intel-gfx] [PATCH 25/27] drm/i915/guc: Handle errors in multi-lrc requests
[Intel-gfx] [PATCH] drm/i915: Use fixed offset for PTEs location
2021-09-30 22:01 UTC (2+ messages)
[Intel-gfx] [PATCH v2 1/9] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip
2021-09-30 21:24 UTC (24+ messages)
` [Intel-gfx] [PATCH v2 2/9] drm/i915/display/psr: Do full fetch when handling multi-planar formats
` [Intel-gfx] [PATCH v2 3/9] drm/i915/display: Drop unnecessary frontbuffer flushes
` [Intel-gfx] [PATCH v2 4/9] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled
` [Intel-gfx] [PATCH v2 5/9] drm/i915/display: Fix glitches when moving cursor with PSR2 selective fetch enabled
` [Intel-gfx] [PATCH v2 6/9] drm/i915/display/adlp: Optimize PSR2 power-savings in corner cases
` [Intel-gfx] [PATCH v2 7/9] drm/i915/display/adlp: Allow PSR2 to be enabled
` [Intel-gfx] [PATCH v2 8/9] drm/i915/display: Enable PSR2 selective fetch by default
` [Intel-gfx] [PATCH v2 9/9] drm/i915/display: Always wait vblank counter to increment when commit needs a modeset
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/9] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/9] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3] drm/dp: Add Additional DP2 Headers
2021-09-30 21:21 UTC (3+ messages)
[Intel-gfx] [PATCH v3] drm/i915/bdb: Fix version check
2021-09-30 20:46 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bdb: Fix version check (rev3)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/4] drm/i915: Clear leftover DP vswing/preemphasis values before modeset
2021-09-30 19:49 UTC (13+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915: Call intel_ddi_init_dp_buf_reg() earlier
` [Intel-gfx] [PATCH 3/4] drm/i915: Remove DP_PORT_EN stuff from link training code
` [Intel-gfx] [PATCH 4/4] drm/i915: Nuke local copies/pointers of intel_dp->DP
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Clear leftover DP vswing/preemphasis values before modeset
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of PCI_DMA_BIDIRECTIONAL
2021-09-30 18:58 UTC (3+ messages)
[Intel-gfx] [PATCH 1/3] drm/i915: Use standard form -EDEADLK check
2021-09-30 16:51 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Adjust intel_crtc_compute_config() debug message
` [Intel-gfx] [PATCH 3/3] drm/i915: Move WaPruneModeWithIncorrectHsyncOffset into intel_mode_valid()
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Use standard form -EDEADLK check
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] Picture stutter on i915 Graphics P630]
2021-09-30 14:50 UTC (2+ messages)
[Intel-gfx] [PATCH v5 01/13] drm/ttm: stop calling tt_swapin in vm_access
2021-09-30 12:55 UTC (6+ messages)
` [Intel-gfx] [PATCH v5 12/13] drm/i915/ttm: use cached system pages when evicting lmem
[Intel-gfx] [PULL] drm-misc-next
2021-09-30 11:27 UTC
[Intel-gfx] [PATCH] drm/i915: Add ww context to intel_dpt_pin, v2
2021-09-30 10:45 UTC (3+ messages)
[Intel-gfx] [PULL] drm-intel-fixes
2021-09-30 8:50 UTC
[Intel-gfx] [PATCH v2] drm/i915/ttm: Rework object initialization slightly
2021-09-30 8:24 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: Rework object initialization slightly (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/3] drm/ttm: s/FLAG_SG/FLAG_EXTERNAL/
2021-09-30 8:20 UTC (5+ messages)
[Intel-gfx] [PATCH 0/9] drm/i915: DP per-lane drive settings prep work
2021-09-30 7:33 UTC (16+ messages)
` [Intel-gfx] [PATCH 2/9] drm/i915: Generalize .set_signal_levels()
` [Intel-gfx] [PATCH 3/9] drm/i915: Nuke usless .set_signal_levels() wrappers
` [Intel-gfx] [PATCH 4/9] drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels()
` [Intel-gfx] [PATCH 5/9] drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()
` [Intel-gfx] [PATCH 6/9] drm/i915: Nuke intel_ddi_hdmi_num_entries()
` [Intel-gfx] [PATCH 7/9] drm/i915: Pass the lane to intel_ddi_level()
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DP per-lane drive settings prep work (rev4)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 8/9] drm/i915: Prepare link training for per-lane drive settings
2021-09-30 7:07 UTC (4+ messages)
` [Intel-gfx] [PATCH v3 "
[Intel-gfx] [PATCH 1/7] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe
2021-09-30 6:55 UTC (6+ messages)
` [Intel-gfx] [PATCH 4/7] drm/i915/display/psr: Handle plane restrictions at every page flip
[Intel-gfx] refactor the i915 GVT support
2021-09-30 5:24 UTC (14+ messages)
[Intel-gfx] [PATCH 0/4] drm: maintenance patches for 5.15-rcX
2021-09-30 3:43 UTC (10+ messages)
` [Intel-gfx] [PATCH 1/4] drm: fix doc grammar error
` [Intel-gfx] [PATCH 2/4] amdgpu_ucode: reduce number of pr_debug calls
` [Intel-gfx] [PATCH 3/4] nouveau: fold multiple DRM_DEBUG_DRIVERs together
` [Intel-gfx] [PATCH 4/4] i915/gvt: remove spaces in pr_debug "gvt: core:" etc prefixes
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: maintenance patches for 5.15-rcX
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3] drm/i915: Update memory bandwidth formulae
2021-09-29 23:39 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Update memory bandwidth formulae (rev3)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/6] drm/i915: Reject bogus modes with fixed mode panels
2021-09-29 22:45 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject bogus modes with fixed mode panels (rev4)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences
2021-09-29 22:23 UTC (7+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH 9/9] drm/i915: Allow per-lane drive settings with LTTPRs
2021-09-29 20:27 UTC (3+ messages)
` [Intel-gfx] [PATCH v2 "
[Intel-gfx] [PATCH] drm/i915: Enable TPS3/4 on all platforms that support them
2021-09-29 20:21 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Enable TPS3/4 on all platforms that support them (rev2)
[Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization
2021-09-29 19:19 UTC (3+ messages)
` [Intel-gfx] [PATCH v2 "
[Intel-gfx] [PATCH 5/6] drm/i915: Reject user modes that don't match fixed mode's refresh rate
2021-09-29 18:45 UTC (2+ messages)
` [Intel-gfx] [PATCH v3 "
[Intel-gfx] [PATCH v2] drm/i915/bdb: Fix version check
2021-09-29 18:01 UTC (2+ messages)
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