messages from 2021-10-04 11:23:22 to 2021-10-05 15:54:56 UTC [more...]
[Intel-gfx] [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name
2021-10-05 15:54 UTC (9+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/display: Remove check for low voltage sku for max dp source rate
2021-10-05 15:31 UTC (7+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/8] drm/i915: PREEMPT_RT related fixups
2021-10-05 15:00 UTC (9+ messages)
` [Intel-gfx] [PATCH 1/8] drm/i915: Use preempt_disable/enable_rt() where recommended
` [Intel-gfx] [PATCH 2/8] drm/i915: Don't disable interrupts on PREEMPT_RT during atomic updates
` [Intel-gfx] [PATCH 3/8] drm/i915: Disable tracing points on PREEMPT_RT
` [Intel-gfx] [PATCH 4/8] drm/i915: skip DRM_I915_LOW_LEVEL_TRACEPOINTS with NOTRACE
` [Intel-gfx] [PATCH 5/8] drm/i915/gt: Queue and wait for the irq_work item
` [Intel-gfx] [PATCH 6/8] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
` [Intel-gfx] [PATCH 7/8] drm/i915: Drop the irqs_disabled() check
` [Intel-gfx] [PATCH 8/8] drm/i915: Don't disable interrupts and pretend a lock as been acquired in __timeline_mark_lock()
[Intel-gfx] [PATCH] drm/i915: Handle Intel igfx + Intel dgfx hybrid graphics setup
2021-10-05 14:55 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle Intel igfx + Intel dgfx hybrid graphics setup (rev3)
[Intel-gfx] [PATCH v2] component: do not leave master devres group open after bind
2021-10-05 14:35 UTC (2+ messages)
[Intel-gfx] [PATCH v2 0/5] drm/i915: Improve DP link training further
2021-10-05 14:35 UTC (13+ messages)
` [Intel-gfx] [PATCH v2 1/5] drm/i915: Tweak the DP "max vswing reached?" condition
` [Intel-gfx] [PATCH v2 2/5] drm/i915: Show LTTPR in the TPS debug print
` [Intel-gfx] [PATCH v2 3/5] drm/i915: Print the DP vswing adjustment request
` [Intel-gfx] [PATCH v2 4/5] drm/i915: Pimp link training debug prints
` [Intel-gfx] [PATCH v2 5/5] drm/i915: Call intel_dp_dump_link_status() for CR failures
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further (rev2)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further (rev3)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve DP link training further (rev4)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve DP link training further (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v5 01/13] drm/ttm: stop calling tt_swapin in vm_access
2021-10-05 14:23 UTC (6+ messages)
` [Intel-gfx] [PATCH v5 09/13] drm/i915/ttm: add tt shmem backend
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v5,01/13] drm/ttm: stop calling tt_swapin in vm_access (rev2)
[Intel-gfx] Deploying new iterator interface for dma-buf
2021-10-05 14:01 UTC (34+ messages)
` [Intel-gfx] [PATCH 01/28] dma-buf: add dma_resv_for_each_fence_unlocked v8
` [Intel-gfx] [PATCH 02/28] dma-buf: add dma_resv_for_each_fence v2
` [Intel-gfx] [PATCH 03/28] dma-buf: add dma_resv selftest v3
` [Intel-gfx] [PATCH 04/28] dma-buf: use new iterator in dma_resv_copy_fences
` [Intel-gfx] [PATCH 05/28] dma-buf: use new iterator in dma_resv_get_fences v3
` [Intel-gfx] [PATCH 06/28] dma-buf: use new iterator in dma_resv_wait_timeout
` [Intel-gfx] [PATCH 07/28] dma-buf: use new iterator in dma_resv_test_signaled
` [Intel-gfx] [PATCH 08/28] dma-buf: use the new iterator in dma_buf_debug_show
` [Intel-gfx] [PATCH 09/28] dma-buf: use the new iterator in dma_resv_poll
` [Intel-gfx] [PATCH 10/28] drm/ttm: use the new iterator in ttm_bo_flush_all_fences
` [Intel-gfx] [PATCH 11/28] drm/amdgpu: use the new iterator in amdgpu_sync_resv
` [Intel-gfx] [PATCH 12/28] drm/amdgpu: use new iterator in amdgpu_ttm_bo_eviction_valuable
` [Intel-gfx] [PATCH 13/28] drm/amdgpu: use new iterator in amdgpu_vm_prt_fini
` [Intel-gfx] [PATCH 14/28] drm/msm: use new iterator in msm_gem_describe
` [Intel-gfx] [PATCH 15/28] drm/radeon: use new iterator in radeon_sync_resv
` [Intel-gfx] [PATCH 16/28] drm/scheduler: use new iterator in drm_sched_job_add_implicit_dependencies v2
` [Intel-gfx] [PATCH 17/28] drm/i915: use the new iterator in i915_gem_busy_ioctl v2
` [Intel-gfx] [PATCH 18/28] drm/i915: use the new iterator in i915_sw_fence_await_reservation v3
` [Intel-gfx] [PATCH 19/28] drm/i915: use the new iterator in i915_request_await_object v2
` [Intel-gfx] [PATCH 20/28] drm/i915: use new iterator in i915_gem_object_wait_reservation
` [Intel-gfx] [PATCH 21/28] drm/i915: use new iterator in i915_gem_object_wait_priority
` [Intel-gfx] [PATCH 22/28] drm/i915: use new cursor in intel_prepare_plane_fb
` [Intel-gfx] [PATCH 23/28] drm: use new iterator in drm_gem_fence_array_add_implicit v3
` [Intel-gfx] [PATCH 24/28] drm: use new iterator in drm_gem_plane_helper_prepare_fb v2
` [Intel-gfx] [PATCH 25/28] drm/nouveau: use the new iterator in nouveau_fence_sync
` [Intel-gfx] [PATCH 26/28] drm/nouveau: use the new interator in nv50_wndw_prepare_fb
` [Intel-gfx] [PATCH 27/28] drm/etnaviv: use new iterator in etnaviv_gem_describe
` [Intel-gfx] [PATCH 28/28] drm/etnaviv: replace dma_resv_get_excl_unlocked
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v8
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] Deploying new iterator interface for dma-buf
2021-10-05 11:23 UTC (24+ messages)
` [Intel-gfx] [PATCH 01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7
` [Intel-gfx] [PATCH 03/28] dma-buf: add dma_resv selftest
` [Intel-gfx] [PATCH 08/28] dma-buf: use the new iterator in dma_buf_debug_show
` [Intel-gfx] [PATCH 09/28] dma-buf: use the new iterator in dma_resv_poll
` [Intel-gfx] [PATCH 23/28] drm: use new iterator in drm_gem_fence_array_add_implicit v3
` [Intel-gfx] [PATCH 24/28] drm: use new iterator in drm_gem_plane_helper_prepare_fb
[Intel-gfx] [PATCH v3 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
2021-10-05 0:03 UTC (14+ messages)
` [Intel-gfx] [PATCH v3 03/14] drm/hdcp: Update property value on content type and user changes
` [Intel-gfx] [Freedreno] "
` [Intel-gfx] [PATCH v3 08/14] drm/msm/dpu_kms: Re-order dpu includes
` [Intel-gfx] [PATCH v3 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder
` [Intel-gfx] [PATCH v3 10/14] drm/msm/dpu: Remove encoder->enable() hack
` [Intel-gfx] [PATCH v3 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
` [Intel-gfx] [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
[Intel-gfx] [RFC v2 0/8] CPU + GPU synchronised priority scheduling
2021-10-05 12:10 UTC (11+ messages)
` [Intel-gfx] [RFC 1/8] sched: Add nice value change notifier
` [Intel-gfx] [RFC 2/8] drm/i915: Explicitly track DRM clients
` [Intel-gfx] [RFC 3/8] drm/i915: Make GEM contexts "
` [Intel-gfx] [RFC 4/8] drm/i915: Track all user contexts per client
` [Intel-gfx] [RFC 5/8] drm/i915: Keep track of registered clients indexed by task struct
` [Intel-gfx] [RFC 6/8] drm/i915: Make some recently added vfuncs use full scheduling attribute
` [Intel-gfx] [RFC 7/8] drm/i915: Inherit process nice for context scheduling priority
` [Intel-gfx] [RFC 8/8] drm/i915: Connect with the process nice change notifier
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for CPU + GPU synchronised priority scheduling (rev2)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for CPU + GPU synchronised priority scheduling (rev3)
[Intel-gfx] [PATCH 00/33] Remaining patches for basic GuC submission
2021-10-05 10:58 UTC (6+ messages)
` [Intel-gfx] [PATCH 25/33] drm/i915/guc: Support request cancellation
[Intel-gfx] [PATCH 00/26] Parallel submission aka multi-bb execbuf
2021-10-05 10:37 UTC (38+ messages)
` [Intel-gfx] [PATCH 01/26] drm/i915/guc: Move GuC guc_id allocation under submission state sub-struct
` [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context
` [Intel-gfx] [PATCH 03/26] drm/i915/guc: Take engine PM when a context is pinned with GuC submission
` [Intel-gfx] [PATCH 04/26] drm/i915/guc: Don't call switch_to_kernel_context "
` [Intel-gfx] [PATCH 05/26] drm/i915: Add logical engine mapping
` [Intel-gfx] [PATCH 06/26] drm/i915: Expose logical engine instance to user
` [Intel-gfx] [PATCH 07/26] drm/i915/guc: Introduce context parent-child relationship
` [Intel-gfx] [PATCH 08/26] drm/i915/guc: Add multi-lrc context registration
` [Intel-gfx] [PATCH 09/26] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts
` [Intel-gfx] [PATCH 10/26] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids
` [Intel-gfx] [PATCH 11/26] drm/i915/guc: Implement parallel context pin / unpin functions
` [Intel-gfx] [PATCH 12/26] drm/i915/guc: Implement multi-lrc submission
` [Intel-gfx] [PATCH 13/26] drm/i915/guc: Insert submit fences between requests in parent-child relationship
` [Intel-gfx] [PATCH 14/26] drm/i915/guc: Implement multi-lrc reset
` [Intel-gfx] [PATCH 15/26] drm/i915/guc: Update debugfs for GuC multi-lrc
` [Intel-gfx] [PATCH 16/26] drm/i915: Fix bug in user proto-context creation that leaked contexts
` [Intel-gfx] [PATCH 17/26] drm/i915/guc: Connect UAPI to GuC multi-lrc interface
` [Intel-gfx] [PATCH 18/26] drm/i915/doc: Update parallel submit doc to point to i915_drm.h
` [Intel-gfx] [PATCH 19/26] drm/i915/guc: Add basic GuC multi-lrc selftest
` [Intel-gfx] [PATCH 20/26] drm/i915/guc: Implement no mid batch preemption for multi-lrc
` [Intel-gfx] [PATCH 21/26] drm/i915: Multi-BB execbuf
` [Intel-gfx] [PATCH 22/26] drm/i915/guc: Handle errors in multi-lrc requests
` [Intel-gfx] [PATCH 23/26] drm/i915: Make request conflict tracking understand parallel submits
` [Intel-gfx] [PATCH 24/26] drm/i915: Update I915_GEM_BUSY IOCTL to understand composite fences
` [Intel-gfx] [PATCH 25/26] drm/i915: Enable multi-bb execbuf
` [Intel-gfx] [PATCH 26/26] drm/i915/execlists: Weak parallel submission support for execlists
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev5)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [RFC PATCH] drm: Increase DRM_OBJECT_MAX_PROPERTY by 18
2021-10-05 10:09 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts
2021-10-05 9:25 UTC (4+ messages)
[Intel-gfx] [vfio:next 33/38] drivers/gpu/drm/i915/i915_pci.c:975:2: warning: missing field 'override_only' initializer
2021-10-05 9:00 UTC (4+ messages)
[Intel-gfx] linux-next: build warning after merge of the drm-misc tree
2021-10-05 8:23 UTC (2+ messages)
[Intel-gfx] refactor the i915 GVT support
2021-10-05 7:33 UTC (13+ messages)
[Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE
2021-10-05 7:13 UTC (5+ messages)
[Intel-gfx] [PATCH] drm/i915/dsi: unregister gmbus if LFP display was MIPI panel
2021-10-05 1:28 UTC (3+ messages)
` [Intel-gfx] [v4] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display
[Intel-gfx] [PATCH 0/2] drm/i915/fbc: Don't nuke manually around flips
2021-10-04 20:25 UTC (5+ messages)
` [Intel-gfx] [PATCH 1/2] drm/i915/fbc: Hoist more stuff out from intel_fbc_hw_(de)activate()
` [Intel-gfx] [PATCH 2/2] drm/i915/fbc: Don't nuke manually around flips
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/fbc: Don't nuke manually around flips (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PULL] drm-intel-next
2021-10-04 19:01 UTC
[Intel-gfx] [PATCH 1/2] drm/i915: Extend the async flip VT-d w/a to skl/bxt
2021-10-04 19:09 UTC (7+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i195: Make the async flip VT-d workaround dynamic
[Intel-gfx] [PATCH v3] drm/atomic: Add the crtc to affected crtc only if uapi.enable = true
2021-10-04 19:32 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/atomic: Add the crtc to affected crtc only if uapi.enable = true (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/10] drm: Add privacy-screen class and connector properties
2021-10-04 18:48 UTC (10+ messages)
` [Intel-gfx] [PATCH 05/10] drm/connector: Add a drm_connector privacy-screen helper functions (v2)
` [Intel-gfx] [PATCH 09/10] drm/i915: Add intel_modeset_probe_defer() helper
` [Intel-gfx] [PATCH 10/10] drm/i915: Add privacy-screen support (v2)
[Intel-gfx] [PATCH v2] drm/i915: Clean up disabled warnings
2021-10-04 17:43 UTC (2+ messages)
[Intel-gfx] i915 MST HDCP code looks broken
2021-10-04 18:38 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/tc: Delete bogus NULL check in intel_ddi_encoder_destroy()
2021-10-04 18:56 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/pmu: Connect engine busyness stats from GuC to pmu
2021-10-04 15:21 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: Prefer struct_size over open coded arithmetic
2021-10-04 15:06 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH 0/5] drm/i915: Improve DP link training further
2021-10-04 15:03 UTC (5+ messages)
` [Intel-gfx] [PATCH 3/5] drm/i915: Print the DP vswing adjustment request
` [Intel-gfx] [PATCH 4/5] drm/i915: Pimp link training debug prints
` [Intel-gfx] [PATCH 5/5] drm/i915: Call intel_dp_dump_link_status() for CR failures
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve DP link training further
[Intel-gfx] [PATCH v2] drm/atomic: Add the crtc to affected crtc only if uapi.enable = true
2021-10-04 11:37 UTC (2+ messages)
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