messages from 2021-11-04 10:14:57 to 2021-11-08 14:07:28 UTC [more...]
[Intel-gfx] [PATCH v0 07/42] drm/i915: Check notifier registration return value
2021-11-08 14:07 UTC (4+ messages)
` [Intel-gfx] [PATCH v0 42/42] notifier: Return an error when callback is already registered
` [Intel-gfx] [PATCH v0 00/42] notifiers: "
[Intel-gfx] [PATCH v2] drm/i915/gem: Fix gem_madvise for ttm+shmem objects
2021-11-08 13:25 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Fix gem_madvise for ttm+shmem objects (rev2)
[Intel-gfx] [PATCH V2] drm/i915/gt: Hold RPM wakelock during PXP suspend
2021-11-08 12:56 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [RFC v2 00/22] Add Support for Plane Color Lut and CSC features
2021-11-08 9:54 UTC (10+ messages)
` [Intel-gfx] [RFC v2 02/22] drm: Add Enhanced Gamma and color lut range attributes
` [Intel-gfx] [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes
[Intel-gfx] [PATCH 0/2] Some fixes in HDMI2.1 PCON FRL configuration
2021-11-08 8:55 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/dp: For PCON TMDS mode set only the relavant bits in config DPCD
` [Intel-gfx] [PATCH v2 "
` [Intel-gfx] ✓ Fi.CI.BAT: success for Some fixes in HDMI2.1 PCON FRL configuration (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gem: Fix gem_madvise for ttm+shmem objects
2021-11-08 8:39 UTC (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3 1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
2021-11-08 8:09 UTC (5+ messages)
` [Intel-gfx] [PATCH v3 2/2] HAX: drm/i915/selftest: Temporarily avoid tainting the kernel on engine reset failure
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 5/5] drm/tegra: check root dentry before debugfs init
2021-11-08 6:35 UTC (2+ messages)
[Intel-gfx] linux-next: manual merge of the drm-misc tree with the origin tree
2021-11-07 22:31 UTC
[Intel-gfx] [PATCH] drm/i915: Fix Memory BW formulae for ADL-P
2021-11-06 3:14 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] linux-next: build failure after merge of the drm-misc tree
2021-11-06 2:33 UTC (6+ messages)
[Intel-gfx] [PATCH] drm/i915: Call intel_update_active_dpll() for both bigjoiner pipes
2021-11-05 23:31 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/display/adlp: Disable underrun recovery
2021-11-05 21:57 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH v5 0/5] drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
2021-11-05 21:36 UTC (11+ messages)
` [Intel-gfx] [PATCH v5 1/5] drm/i915: Add support for panels with VESA backlights with PWM enable/disable
` [Intel-gfx] [PATCH v5 2/5] drm/nouveau/kms/nv50-: Explicitly check DPCD backlights for aux enable/brightness
` [Intel-gfx] [PATCH v5 3/5] drm/dp: Don't read back backlight mode in drm_edp_backlight_enable()
` [Intel-gfx] [PATCH v5 4/5] drm/dp, drm/i915: Add support for VESA backlights using PWM for brightness control
` [Intel-gfx] [PATCH v5 5/5] drm/i915: Clarify probing order in intel_dp_aux_init_backlight_funcs()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev11)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/2] drm/atomic: document and enforce rules around "spurious" EBUSY
2021-11-05 20:47 UTC (2+ messages)
[Intel-gfx] [PATCH v10 00/10] use DYNAMIC_DEBUG to implement DRM.debug & DRM.trace
2021-11-05 20:31 UTC (12+ messages)
` [Intel-gfx] [PATCH v10 01/10] dyndbg: add DEFINE_DYNAMIC_DEBUG_BITGRPS macro and callbacks
` [Intel-gfx] [PATCH v10 02/10] drm: fix doc grammar
` [Intel-gfx] [PATCH v10 03/10] amdgpu: use dyndbg.BITGRPS to control existing pr_debugs
` [Intel-gfx] [PATCH v10 04/10] i915/gvt: trim spaces from pr_debug "gvt: core:" prefixes
` [Intel-gfx] [PATCH v10 05/10] i915/gvt: use dyndbg.BITGRPS for existing pr_debugs
` [Intel-gfx] [PATCH v10 06/10] drm_print: add choice to use dynamic debug in drm-debug
` [Intel-gfx] [PATCH v10 07/10] drm_print: instrument drm_debug_enabled
` [Intel-gfx] [PATCH v10 08/10] dyndbg: add print-to-tracefs, selftest with it - RFC
` [Intel-gfx] [PATCH v10 09/10] dyndbg: create DEFINE_DYNAMIC_DEBUG_LOG|TRACE_GROUPS
` [Intel-gfx] [PATCH v10 10/10] drm: use DEFINE_DYNAMIC_DEBUG_TRACE_GROUPS in 3 places
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for use DYNAMIC_DEBUG to implement DRM.debug & DRM.trace (rev2)
[Intel-gfx] [PATCH 1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
2021-11-05 18:40 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/2] HAX: drm/i915/selftest: Temporarily avoid tainting the kernel on engine reset failure
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3] drm/i915/display: Exit PSR when doing async flips
2021-11-05 17:55 UTC (6+ messages)
[Intel-gfx] [PATCH 0/2] Nuke PAGE_KERNEL_IO
2021-11-05 15:29 UTC (3+ messages)
` [Intel-gfx] [PATCH 2/2] x86/mm: nuke PAGE_KERNEL_IO
[Intel-gfx] [PATCH 00/17] drm/i915/fbc: Prep work for multiple FBC instances
2021-11-05 13:08 UTC (23+ messages)
` [Intel-gfx] [PATCH 01/17] drm/i915/fbc: Exract snb_fbc_program_fence()
` [Intel-gfx] [PATCH 02/17] drm/i915/fbc: Extract {skl, glk}_fbc_program_cfb_stride()
` [Intel-gfx] [PATCH 03/17] drm/i915/fbc: Just use params->fence_y_offset always
` [Intel-gfx] [PATCH 04/17] drm/i915/fbc: Introduce intel_fbc_is_compressing()
` [Intel-gfx] [PATCH 05/17] drm/i915/fbc: Extract helpers to compute FBC control register values
` [Intel-gfx] [PATCH 06/17] drm/i915/fbc: Introduce intel_fbc_funcs
` [Intel-gfx] [PATCH 07/17] drm/i915/fbc: Introduce .nuke() vfunc
` [Intel-gfx] [PATCH 08/17] drm/i915/fbc: s/gen7/ivb/
` [Intel-gfx] [PATCH 09/17] drm/i915/fbc: Introduce .program_cfb() vfunc
` [Intel-gfx] [PATCH 10/17] drm/i915/fbc: Introduce intel_fbc_set_false_color()
` [Intel-gfx] [PATCH 11/17] drm/i915/fbc: Nuke BDW_FBC_COMP_SEG_MASK
` [Intel-gfx] [PATCH 12/17] drm/i915/fbc: Clean up all register defines
` [Intel-gfx] [PATCH 13/17] drm/i915/fbc: Finish polishing FBC1 registers
` [Intel-gfx] [PATCH 14/17] drm/i915: Relocate FBC_LLC_READ_CTRL
` [Intel-gfx] [PATCH 15/17] drm/i915/fbc: s/dev_priv/i915/
` [Intel-gfx] [PATCH 16/17] drm/i915/fbc: Start passing around intel_fbc
` [Intel-gfx] [PATCH 17/17] drm/1915/fbc: Replace plane->has_fbc with a pointer to the fbc instance
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: Prep work for multiple FBC instances
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 0/2] Cleanups for the nomodeset kernel command line parameter logic
2021-11-05 13:00 UTC (24+ messages)
` [Intel-gfx] [PATCH v2 1/2] drm: Add a drm_drv_enabled() to check if drivers should be enabled
` [Intel-gfx] [PATCH v2 2/2] drm: Move nomodeset kernel parameter to the DRM subsystem
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Cleanups for the nomodeset kernel command line parameter logic (rev4)
[Intel-gfx] [PATCH v2 1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
2021-11-05 11:36 UTC (5+ messages)
` [Intel-gfx] [PATCH v2 2/2] HAX: drm/i915/selftest: Temporarily avoid tainting the kernel on engine reset failure
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3 1/6] drm/i915/audio: group audio under anonymous struct in drm_i915_private
2021-11-05 11:29 UTC (13+ messages)
` [Intel-gfx] [PATCH v3 2/6] drm/i915/audio: name the audio sub-struct "
` [Intel-gfx] [PATCH v3 3/6] drm/i915/audio: define the audio struct separately from drm_i915_private
` [Intel-gfx] [PATCH v3 4/6] drm/i915/audio: move intel_audio_funcs internal to intel_audio.c
` [Intel-gfx] [PATCH v3 5/6] drm/i915/audio: clean up LPE audio init/cleanup calls
` [Intel-gfx] [PATCH v3 6/6] drm/i915/audio: rename intel_init_audio_hooks to intel_audio_hooks_init
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/audio: group audio under anonymous struct in drm_i915_private
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v5 1/3] drm: Move drm_color_lut_check implementation internal to intel_color
2021-11-05 10:10 UTC (4+ messages)
` [Intel-gfx] [PATCH v5 2/3] drm: Add Gamma and Degamma LUT sizes props to drm_crtc to validate
[Intel-gfx] [PULL] drm-misc-next-fixes
2021-11-05 7:43 UTC
[Intel-gfx] [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
2021-11-05 3:52 UTC (18+ messages)
` [Intel-gfx] [PATCH v4 01/14] drm/hdcp: Add drm_hdcp_atomic_check()
` [Intel-gfx] [PATCH v4 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check
` [Intel-gfx] [PATCH v4 03/14] drm/hdcp: Update property value on content type and user changes
` [Intel-gfx] [PATCH v4 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check
` [Intel-gfx] [PATCH v4 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache
` [Intel-gfx] [PATCH v4 06/14] drm/i915/hdcp: Retain hdcp_capable return codes
` [Intel-gfx] [PATCH v4 07/14] drm/i915/hdcp: Use HDCP helpers for i915
` [Intel-gfx] [PATCH v4 08/14] drm/msm/dpu_kms: Re-order dpu includes
` [Intel-gfx] [PATCH v4 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder
` [Intel-gfx] [PATCH v4 10/14] drm/msm/dpu: Remove encoder->enable() hack
` [Intel-gfx] [PATCH v4 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
` [Intel-gfx] [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
` [Intel-gfx] [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
` [Intel-gfx] [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] linux-next: manual merge of the char-misc tree with the drm-intel tree
2021-11-05 1:51 UTC (2+ messages)
[Intel-gfx] [PATCH v9] drm/i915: Update memory bandwidth formulae
2021-11-04 23:05 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Update memory bandwidth formulae (rev9)
[Intel-gfx] [PATCH] drm/i915/pmu: Fix synchronization of PMU callback with reset
2021-11-04 22:04 UTC (4+ messages)
[Intel-gfx] [PATCH] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks
2021-11-04 19:12 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] kernel/locking: Add context to ww_mutex_trylock
2021-11-04 18:15 UTC (11+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] [PATCH] kernel/locking: Use a pointer in ww_mutex_trylock()
` [Intel-gfx] ✓ Fi.CI.BAT: success for kernel/locking: Add context to ww_mutex_trylock. (rev5)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v4 1/3] drm: Move drm_color_lut_check implementation internal to intel_color
2021-11-04 17:52 UTC (3+ messages)
` [Intel-gfx] [PATCH v4 2/3] drm: Add Gamma and Degamma LUT sizes props to drm_crtc to validate
[Intel-gfx] [PATCH v6 0/2] drm/i915: Failsafe migration blits
2021-11-04 17:32 UTC (6+ messages)
` [Intel-gfx] [PATCH v6 1/2] drm/i915/ttm: Reorganize the ttm move code
` [Intel-gfx] [PATCH v6 2/2] drm/i915/ttm: Failsafe migration blits
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Failsafe migration blits (rev7)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 01/13] drm/connector: Add define for HDMI 1.4 Maximum Pixel Rate
2021-11-04 15:41 UTC (5+ messages)
[Intel-gfx] refactor the i915 GVT support and move to the modern mdev API v2
2021-11-04 14:51 UTC (8+ messages)
` [Intel-gfx] [PATCH 02/29] drm/i915/gvt: integrate into the main Makefile
` [Intel-gfx] [PATCH 06/29] drm/i915/gvt: move the gvt code into kvmgt.ko
[Intel-gfx] [PATCH v5 0/2] drm/i915: Failsafe migration blits
2021-11-04 10:14 UTC (3+ messages)
` [Intel-gfx] [PATCH v5 1/2] drm/i915/ttm: Reorganize the ttm move code
` [Intel-gfx] [PATCH v5 2/2] drm/i915/ttm: Failsafe migration blits
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