Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
 messages from 2021-11-11 22:02:38 to 2021-11-15 14:59:01 UTC [more...]

[Intel-gfx] [PATCH v2 0/1] drm/i915/rpm: Enable runtime pm autosuspend by default
 2021-11-15 14:58 UTC  (6+ messages)
` [Intel-gfx] [PATCH v2 1/1] "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/rpm: Enable runtime pm autosuspend by default (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915/fbc: fix the FBC kernel-doc warnings
 2021-11-15 14:55 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "

[Intel-gfx] [PATCH 0/3] drm/i915, agp/intel-ggt: clean up includes
 2021-11-15 14:49 UTC  (9+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915: include intel-gtt.h only where needed
` [Intel-gfx] [PATCH 2/3] agp/intel-gtt: Replace kernel.h with the necessary inclusions
` [Intel-gfx] [PATCH 3/3] agp/intel-gtt: reduce intel-gtt dependencies more
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915, agp/intel-ggt: clean up includes
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v1 1/3] string: Consolidate yesno() helpers under string.h hood
 2021-11-15 14:22 UTC  (5+ messages)

[Intel-gfx] [PATCH 0/1] Enable runtime pm autosuspend by default
 2021-11-15 14:18 UTC  (5+ messages)
` [Intel-gfx] [PATCH 1/1] drm/i915/rpm: "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] Deploying new iterator interface for dma-buf
 2021-11-15 14:08 UTC  (4+ messages)
` [Intel-gfx] [PATCH 12/26] drm/scheduler: use new iterator in drm_sched_job_add_implicit_dependencies v2

[Intel-gfx] [PATCH v3 0/6] drm/i915/ttm: Async migration
 2021-11-15 13:29 UTC  (19+ messages)
` [Intel-gfx] [PATCH v3 1/6] drm/i915: Add functions to set/get moving fence
` [Intel-gfx] [PATCH v3 2/6] drm/i915: Add support for asynchronous moving fence waiting
` [Intel-gfx] [PATCH v3 3/6] drm/i915/ttm: Move the i915_gem_obj_copy_ttm() function
` [Intel-gfx] [PATCH v3 4/6] drm/i915/ttm: Break refcounting loops at device region unref time
` [Intel-gfx] [PATCH v3 5/6] drm/i915/ttm: Implement asynchronous TTM moves
` [Intel-gfx] [PATCH v3 6/6] drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/ttm: Async migration (rev4)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915: Fix fastsets on TypeC ports following a non-blocking modeset
 2021-11-15 12:45 UTC  (7+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 0/3] Introduce Raptor Lake S
 2021-11-15 12:20 UTC  (13+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915/rpl-s: Add PCI IDS
` [Intel-gfx] [PATCH 2/3] drm/i915/rpl-s: Add PCH ID
` [Intel-gfx] [PATCH 3/3] drm/i915/rpl-s: Enable guc submission by default
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Raptor Lake S
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/dp: Perform 30ms delay after source OUI write
 2021-11-15 10:53 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/execlists: Weak parallel submission support for execlists
 2021-11-15 10:34 UTC  (10+ messages)

[Intel-gfx] [PATCH] ALSA: hda: fix general protection fault in azx_runtime_idle
 2021-11-15  7:57 UTC  (12+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ALSA: hda: fix general protection fault in azx_runtime_idle (rev3)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/dsi: let HW maintain the HS-TRAIL timing
 2021-11-15  5:14 UTC  (5+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/dsi: let HW maintain the HS-TRAIL timing (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] Can't drive 4K monitor at full resolution over DP
 2021-11-14 22:02 UTC  (3+ messages)

[Intel-gfx] Commit a22c074fd1dd52a8b41dd6789220409b64093e9c broke Intel Corporation HD Graphics (rev 08)
 2021-11-14 21:08 UTC 

[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
 2021-11-13 17:34 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v4 0/3] Introduce new i915 macros for checking PTEs
 2021-11-13 16:22 UTC  (8+ messages)
` [Intel-gfx] [PATCH v4 1/3] drm/i915: Introduce new macros for i915 PTE

[Intel-gfx] [PATCH 0/9] drm/i915: Register define cleanups
 2021-11-12 23:41 UTC  (14+ messages)
` [Intel-gfx] [PATCH 1/9] drm/i915: Bump DSL linemask to 20 bits
` [Intel-gfx] [PATCH 2/9] drm/i915: Clean up PIPEMISC register defines
` [Intel-gfx] [PATCH 3/9] drm/i915: Clean up SKL_BOTTOM_COLOR defines
` [Intel-gfx] [PATCH 4/9] drm/i915: Clean up PIPECONF bit defines
` [Intel-gfx] [PATCH 5/9] drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL "
` [Intel-gfx] [PATCH 6/9] drm/i915: Clean up PIPESRC defines
` [Intel-gfx] [PATCH 7/9] drm/i915: Clean up CRC register defines
` [Intel-gfx] [PATCH 8/9] drm/i915: Clean up DPINVGTT/VLV_DPFLIPSTAT bits
` [Intel-gfx] [PATCH 9/9] drm/i915: Clean up FPGA_DBG/CLAIM_ER bits
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Register define cleanups
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
 2021-11-12 22:06 UTC  (3+ messages)
` [Intel-gfx] [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers

[Intel-gfx] [PATCH 0/2] Nuke PAGE_KERNEL_IO
 2021-11-12 21:04 UTC  (5+ messages)

[Intel-gfx] [PATCH] drm/i915/pmu: Increase the live_engine_busy_stats sample period
 2021-11-12 20:51 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: Don't read query SSEU for non-existent slice 0 on old platforms
 2021-11-12 19:04 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 1/6] drm/i915: move the pre_pin earlier
 2021-11-12 18:06 UTC  (9+ messages)
` [Intel-gfx] [PATCH 2/6] drm/i915: Create a dummy object for gen6 ppgtt
` [Intel-gfx] [PATCH 3/6] drm/i915: Create a full object for mock_ring, v2
` [Intel-gfx] [PATCH 4/6] drm/i915: vma is always backed by an object
` [Intel-gfx] [PATCH 5/6] drm/i915: Remove resv from i915_vma
` [Intel-gfx] [PATCH 6/6] drm/i915: Drain the ttm delayed workqueue too
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/6] drm/i915: move the pre_pin earlier
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v10 00/10 RESEND] use DYNAMIC_DEBUG to implement DRM.debug & DRM.trace
 2021-11-12 17:54 UTC  (15+ messages)
` [Intel-gfx] [PATCH v10 03/10] amdgpu: use dyndbg.BITGRPS to control existing pr_debugs
` [Intel-gfx] [PATCH v10 04/10] i915/gvt: trim spaces from pr_debug "gvt: core:" prefixes
` [Intel-gfx] [PATCH v10 05/10] i915/gvt: use dyndbg.BITGRPS for existing pr_debugs
` [Intel-gfx] [PATCH v10 06/10] drm_print: add choice to use dynamic debug in drm-debug
` [Intel-gfx] [PATCH v10 07/10] drm_print: instrument drm_debug_enabled
` [Intel-gfx] [PATCH v10 08/10] dyndbg: add print-to-tracefs, selftest with it - RFC
` [Intel-gfx] [PATCH v10 09/10] dyndbg: create DEFINE_DYNAMIC_DEBUG_LOG|TRACE_GROUPS
` [Intel-gfx] [PATCH v10 10/10] drm: use DEFINE_DYNAMIC_DEBUG_TRACE_GROUPS in 3 places
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for use DYNAMIC_DEBUG to implement DRM.debug & DRM.trace (rev3)

[Intel-gfx] [PATCH] drm/i915/guc/slpc: Check GuC status before freq boost
 2021-11-12 16:05 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 01/28] drm/i915: Fix i915_request fence wait semantics
 2021-11-12 16:07 UTC  (10+ messages)
` [Intel-gfx] [PATCH 02/28] drm/i915: use new iterator in i915_gem_object_wait_reservation

[Intel-gfx] [PATCH v2] drm/i915: Skip error capture when wedged on init
 2021-11-12 15:44 UTC  (3+ messages)
` [Intel-gfx] [PATCH v3] "

[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
 2021-11-12 15:37 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [RFC v2 00/22] Add Support for Plane Color Lut and CSC features
 2021-11-12 14:54 UTC  (9+ messages)
` [Intel-gfx] [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes

[Intel-gfx] [PATCH] drm/i915: Use per device iommu check
 2021-11-12 14:10 UTC  (14+ messages)

[Intel-gfx] [PATCH][next] drm/i915: make array states static const
 2021-11-12 14:06 UTC  (2+ messages)

[Intel-gfx] [PATCH 0/4] i915: Additional DG2 workarounds
 2021-11-12 13:08 UTC  (11+ messages)
` [Intel-gfx] [PATCH 1/4] drm/i915/dg2: Add Wa_14010547955
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Additional DG2 workarounds
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Additional DG2 workarounds (rev2)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: success for i915: Additional DG2 workarounds
` [Intel-gfx] ✓ Fi.CI.IGT: success for i915: Additional DG2 workarounds (rev2)

[Intel-gfx] [PATCH v2 0/6] drm/i915/ttm: Async migration
 2021-11-12 12:44 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/ttm: Async migration (rev3)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH v2] drm/i915/selftest: Disable IRQ for timestamp calculation
 2021-11-12 12:22 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 0/3] i915: Initial workarounds for Xe_HP SDV and DG2
 2021-11-12 12:05 UTC  (9+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/dg2: Add initial gt/ctx/engine workarounds
` [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Initial workarounds for Xe_HP SDV and DG2

[Intel-gfx] [PATCH 00/17] drm/i915/fbc: Prep work for multiple FBC instances
 2021-11-12 11:11 UTC  (3+ messages)
` [Intel-gfx] [PATCH 09/17] drm/i915/fbc: Introduce .program_cfb() vfunc

[Intel-gfx] [PATCH V3] drm/i915/gt: Hold RPM wakelock during PXP suspend
 2021-11-12 10:55 UTC  (2+ messages)

[Intel-gfx] [PATCH] drm/i915/execlists: Weak parallel submission support for execlists
 2021-11-12  7:38 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Weak parallel submission support for execlists (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 3/4] drm/i915/dg2: Add Wa_16013000631
 2021-11-12  5:15 UTC  (2+ messages)
` [Intel-gfx] [PATCH v2 "

[Intel-gfx] [PATCH] drm/i915/display/dsc: Clamp the max DSC input BPP to connector's max bpp
 2021-11-11 23:41 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c
 2021-11-11 23:32 UTC  (2+ messages)


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox