messages from 2024-04-02 09:50:54 to 2024-04-04 10:48:21 UTC [more...]
[PATCH v0 00/14] Make I2C terminology more inclusive for I2C Algobit and consumers
2024-04-03 8:30 UTC (9+ messages)
` [PATCH v0 01/14] IB/hfi1, IB/qib: Make I2C terminology more inclusive
` [PATCH v0 03/14] drm/gma500, drm/i915: "
` [PATCH v0 03/14] drm/gma500,drm/i915: "
[PATCH 0/7] Enable Aux Based EDP HDR
2024-04-04 10:15 UTC (14+ messages)
` [PATCH 1/7] drm/i915/dp: Make has_gamut_metadata_dip() non static
` [PATCH 2/7] drm/i915/dp: Add TCON HDR capability checks
` [PATCH 3/7] drm/i915/dp: Fix Register bit naming
` [PATCH 4/7] drm/i915/dp: Fix comments on EDP HDR DPCD registers
` [PATCH 5/7] drm/i915/dp: Enable AUX based backlight for HDR
` [PATCH 6/7] drm/i915/dp: Write panel override luminance values
` [PATCH 7/7] drm/i915/dp: Limit brightness level to 20
` ✗ Fi.CI.SPARSE: warning for Enable Aux Based EDP HDR
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PULL] drm-misc-fixes
2024-04-04 10:48 UTC
[rebase 1/3] drm: Add drm_vblank_work_flush_all()
2024-04-04 10:48 UTC (3+ messages)
` [rebase 2/3] drm/i915: Use vblank worker to unpin old legacy cursor fb safely
` [rebase 3/3] drm/i915: Use the same vblank worker for atomic unpin
[PATCH v3 0/4] drm/i915/display: DMC wakelock implementation
2024-04-04 10:03 UTC (10+ messages)
` [PATCH v3 2/4] drm/i915/display: don't allow DMC wakelock on older hardware
` [PATCH v3 3/4] drm/i915/display: add module parameter to enable DMC wakelock
` [PATCH v3 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions
[PATCH v2 00/14] drm/i915: Implemnt vblank sycnhronized mbus joining changes
2024-04-04 7:31 UTC (21+ messages)
` [PATCH v2 01/14] drm/i915/cdclk: Fix CDCLK programming order when pipes are active
` [PATCH v2 02/14] drm/i915/cdclk: Fix voltage_level programming edge case
` [PATCH v2 03/14] drm/i915/cdclk: Drop tgl/dg2 cdclk bump hacks
` [PATCH v2 04/14] drm/i915/cdclk: Indicate whether CDCLK change happens during pre or post plane update
` [PATCH v2 05/14] drm/i915: Loop over all active pipes in intel_mbus_dbox_update
` [PATCH v2 06/14] drm/i915: Relocate intel_mbus_dbox_update()
` [PATCH v2 07/14] drm/i915: Extract intel_dbuf_mbus_join_update()
` [PATCH v2 08/14] drm/i915: Extract intel_dbuf_mdclk_min_tracker_update()
` [PATCH v2 09/14] drm/i915: Add debugs for mbus joining and dbuf ratio programming
` [PATCH v2 10/14] drm/i915: Use old mbus_join value when increasing CDCLK
` [PATCH v2 11/14] drm/i915: Use the correct mdclk/cdclk ratio in MBUS updates
` [PATCH v2 12/14] drm/i915: Implement vblank synchronized MBUS join changes
` [PATCH v2 13/14] drm/i915: Use a plain old int for the cdclk/mdclk ratio
` [PATCH v2 14/14] drm/i915: Optimize out redundant dbuf slice updates
` ✗ Fi.CI.SPARSE: warning for drm/i915: Implemnt vblank sycnhronized mbus joining changes (rev3)
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
` ✗ Fi.CI.SPARSE: warning for drm/i915: Implemnt vblank sycnhronized mbus joining changes (rev4)
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH v2 00/25] Enable dislay support for Battlemage
2024-04-04 3:58 UTC (52+ messages)
` [PATCH v2 01/25] drm/i915/display: Prepare to handle new C20 PLL register address
` [PATCH v2 02/25] drm/xe/bmg: Add BMG platform definition
` [PATCH v2 03/25] drm/xe/bmg: Define IS_BATTLEMAGE macro
` [PATCH v2 04/25] drm/i915/bmg: "
` [PATCH v2 05/25] drm/i915/xe2: Skip CCS modifiers for Xe2 platforms
` [PATCH v2 06/25] drm/i915/xe2hpd: Initial cdclk table
` [PATCH v2 07/25] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping"
` [PATCH v2 08/25] drm/i915/bmg: Extend DG2 tc check to future
` [PATCH v2 09/25] drm/i915/xe2hpd: Properly disable power in port A
` [PATCH v2 10/25] drm/i915/xe2hpd: Add new C20 PLL register address
` [PATCH v2 11/25] drm/i915/xe2hpd: Add support for eDP PLL configuration
` [PATCH v2 12/25] drm/i915/xe2hpd: update pll values in sync with Bspec
` [PATCH v2 13/25] drm/i915/xe2hpd: Add display info
` [PATCH v2 14/25] drm/i915/xe2hpd: Add missing chicken bit register programming
` [PATCH v2 15/25] drm/xe/display: Lane reversal requires writes to both context lanes
` [PATCH v2 16/25] drm/xe/xe2hpd: Define a new DRAM type INTEL_DRAM_GDDR
` [PATCH v2 17/25] drm/i915/xe2hpd: Add max memory bandwidth algorithm
` [PATCH v2 18/25] drm/i915/display: Enable RM timeout detection
` [PATCH v2 19/25] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits
` [PATCH v2 20/25] drm/i915/bmg: BMG should re-use MTL's south display logic
` [PATCH v2 21/25] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5
` [PATCH v2 22/25] drm/xe/gt_print: add xe_gt_err_once()
` [PATCH v2 23/25] drm/xe/device: implement transient flush
` [PATCH v2 24/25] drm/i915/display: perform "
` [PATCH v2 25/25] drm/xe/bmg: Enable the display support
` ✗ Fi.CI.CHECKPATCH: warning for Enable dislay support for Battlemage (rev2)
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH] drm/i915/guc: Fix the fix for reset lock confusion
2024-04-03 21:50 UTC (3+ messages)
[PATCH] drm/xe/display: fix potential overflow when multiplying 2 u32
2024-04-03 18:56 UTC (4+ messages)
[PATCH] drm/i915/guc: Remove bogus null check
2024-04-03 18:46 UTC (6+ messages)
[PATCH v5 00/19] Panel replay selective update support
2024-04-03 16:33 UTC (24+ messages)
` [PATCH v5 01/19] drm/i915/psr: Add some documentation of variables used in psr code
` [PATCH v5 02/19] drm/i915/psr: Set intel_crtc_state->has_psr on panel replay as well
` [PATCH v5 03/19] drm/i915/psr: Intel_psr_pause/resume needs to support panel replay
` [PATCH v5 04/19] drm/i915/psr: Do not update phy power state in case of non-eDP "
` [PATCH v5 05/19] drm/i915/psr: Check possible errors for panel replay as well
` [PATCH v5 06/19] drm/i915/psr: Do not write registers/bits not applicable for panel replay
` [PATCH v5 07/19] drm/i915/psr: Call intel_psr_init_dpcd in intel_dp_detect
` [PATCH v5 08/19] drm/i915/psr: Unify panel replay enable/disable sink
` [PATCH v5 09/19] drm/i915/psr: Panel replay has to be enabled before link training
` [PATCH v5 10/19] drm/i915/psr: Rename has_psr2 as has_sel_update
` [PATCH v5 11/19] drm/i915/psr: Rename psr2_enabled as sel_update_enabled
` [PATCH v5 12/19] drm/panelreplay: dpcd register definition for panelreplay SU
` [PATCH v5 13/19] drm/i915/psr: Detect panel replay selective update support
` [PATCH v5 14/19] drm/i915/psr: Modify intel_dp_get_su_granularity to support panel replay
` [PATCH v5 15/19] drm/i915/psr: Panel replay uses SRD_STATUS to track it's status
` [PATCH v5 16/19] drm/i915/psr: Do not apply workarounds in case of panel replay
` [PATCH v5 17/19] drm/i915/psr: Update PSR module parameter descriptions
` [PATCH v5 18/19] drm/i915/psr: Split intel_psr2_config_valid for panel replay
` [PATCH v5 19/19] drm/i915/psr: Add panel replay sel update support to debugfs interface
` ✗ Fi.CI.CHECKPATCH: warning for Panel replay selective update support (rev5)
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[linux-next:master] BUILD REGRESSION 727900b675b749c40ba1f6669c7ae5eb7eb8e837
2024-04-03 15:56 UTC
[PATCH 00/13] drm/i915: Implemnt vblank sycnhronized mbus joining changes
2024-04-03 15:51 UTC (13+ messages)
` [PATCH 01/13] drm/i915/cdclk: Fix CDCLK programming order when pipes are active
` [PATCH 02/13] drm/i915/cdclk: Fix voltage_level programming edge case
` [PATCH 11/13] drm/i915: Implement vblank synchronized MBUS join changes
` [PATCH 12/13] drm/i915: Use a plain old int for the cdclk/mdclk ratio
[PATCHv3] drm/xe/display: check for error on drmm_mutex_init
2024-04-03 15:49 UTC (2+ messages)
` ✗ Fi.CI.BAT: failure for drm/xe/display: check for error on drmm_mutex_init (rev4)
[PATCHv2] drm/xe/display: check for error on drmm_mutex_init
2024-04-03 15:32 UTC (4+ messages)
[PATCH v4] drm/i915: limit eDP MSO pipe only for display version 20 and below
2024-04-03 13:05 UTC
[PATCH 00/11] drm/i915/dp: Few MTL/DSC and a UHBR monitor fix
2024-04-03 12:10 UTC (10+ messages)
` [PATCH 01/11] drm/i915/dp: Fix DSC line buffer depth programming
` [PATCH 05/11] drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
[PATCH 00/25] Enable dislay support for Battlemage
2024-04-03 11:02 UTC (28+ messages)
` [PATCH 01/25] drm/i915/display: Prepare to handle new C20 PLL register address
` [PATCH 02/25] drm/xe/bmg: Add BMG platform definition
` [PATCH 03/25] drm/xe/bmg: Define IS_BATTLEMAGE macro
` [PATCH 04/25] drm/i915/bmg: "
` [PATCH 05/25] drm/i915/xe2: Skip CCS modifiers for Xe2 platforms
` [PATCH 06/25] drm/i915/xe2hpd: Initial cdclk table
` [PATCH 07/25] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping"
` [PATCH 08/25] drm/i915/bmg: Extend DG2 tc check to future
` [PATCH 09/25] drm/i915/xe2hpd: Properly disable power in port A
` [PATCH 10/25] drm/i915/xe2hpd: Add new C20 PLL register address
` [PATCH 11/25] drm/i915/xe2hpd: Add support for eDP PLL configuration
` [PATCH 12/25] drm/i915/xe2hpd: update pll values in sync with Bspec
` [PATCH 13/25] drm/i915/xe2hpd: Add display info
` [PATCH 14/25] drm/i915/xe2hpd: Add missing chicken bit register programming
` [PATCH 15/25] drm/xe/display: Lane reversal requires writes to both context lanes
` [PATCH 16/25] drm/xe/xe2hpd: Define a new DRAM type INTEL_DRAM_GDDR
` [PATCH 17/25] drm/i915/xe2hpd: Add max memory bandwidth algorithm
` [PATCH 18/25] drm/i915/display: Enable RM timeout detection
` [PATCH 19/25] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits
` [PATCH 20/25] drm/i915/bmg: BMG should re-use MTL's south display logic
` [PATCH 21/25] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5
` [PATCH 22/25] drm/xe/gt_print: add xe_gt_err_once()
` [PATCH 23/25] drm/xe/device: implement transient flush
` [PATCH 24/25] drm/i915/display: perform "
` [PATCH 25/25] drm/xe/bmg: Enable the display support
` ✗ Fi.CI.BUILD: failure for Enable dislay support for Battlemage
[CI 1/3] drm: Add drm_vblank_work_flush_all()
2024-04-03 9:51 UTC (2+ messages)
` ✗ Fi.CI.BUILD: failure for series starting with [CI,1/3] drm: Add drm_vblank_work_flush_all(). (rev2)
[PATCH] drm/i915/display: fix display param dup for NULL char * params
2024-04-03 8:03 UTC (6+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✗ Fi.CI.BAT: failure "
[PATCH 00/22] drm/i915: Bigjoiner modeset sequence redesign and MST support
2024-04-03 4:32 UTC (5+ messages)
` [PATCH 18/22] drm/i915: Handle joined pipes inside hsw_crtc_disable()
[PATCH v2] drm: ensure drm headers are self-contained and pass kernel-doc
2024-04-03 2:49 UTC (4+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH 0/7] drm/i915: Bigjoiner prep work
2024-04-03 1:59 UTC (11+ messages)
` [PATCH 1/7] drm/i915: Remove DRM_MODE_FLAG_DBLSCAN checks from .mode_valid() hooks
` [PATCH 2/7] drm/i915: Shuffle DP .mode_valid() checks
` [PATCH 3/7] drm/i915: Clean up glk_pipe_scaler_clock_gating_wa()
` [PATCH 4/7] drm/i915: Extract glk_need_scaler_clock_gating_wa()
` [PATCH 5/7] drm/i915/mst: Limit MST+DSC to TGL+
` [PATCH 6/7] drm/i915/mst: Reject FEC+MST on ICL
` [PATCH 7/7] drm/i915: Use debugfs_create_bool() for "i915_bigjoiner_force_enable"
` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Bigjoiner prep work
` ✗ Fi.CI.SPARSE: "
` ✗ Fi.CI.IGT: failure "
[linux-next:master] BUILD REGRESSION c0b832517f627ead3388c6f0c74e8ac10ad5774b
2024-04-03 0:24 UTC
linux-next: build failure after merge of the drm-misc tree
2024-04-02 23:47 UTC
[PATCH 0/2] Fix UBSAN warning in hdcp_info
2024-04-02 21:18 UTC (2+ messages)
` ✓ Fi.CI.IGT: success for Fix UBSAN warning in hdcp_info (rev3)
[RFC] drm/i915/dp: Log message when limiting SST link rate MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit
2024-04-02 17:26 UTC (2+ messages)
[PATCH v4 00/19] Panel replay selective update support
2024-04-02 12:07 UTC (7+ messages)
` [PATCH v4 16/19] drm/i915/psr: Do not apply workarounds in case of panel replay
` [PATCH v4 18/19] drm/i915/psr: Split intel_psr2_config_valid for "
` [PATCH v4 19/19] drm/i915/psr: Add panel replay sel update support to debugfs interface
` ✗ Fi.CI.CHECKPATCH: warning for Panel replay selective update support (rev4)
` ✗ Fi.CI.SPARSE: "
` ✗ Fi.CI.BAT: failure "
Intel Gfx Kernel CI downtime 12.04-15.04
2024-04-02 11:41 UTC
[PATCH v3 00/21] Panel replay selective update support
2024-04-02 9:54 UTC (6+ messages)
` [PATCH v3 04/21] drm/i915/psr: Rename intel_psr_enabled
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