messages from 2025-11-28 09:36:16 to 2025-12-01 13:39:42 UTC [more...]
[PATCH 0/6] dma-fence: Remove return code of dma_fence_signal() et al
2025-12-01 13:23 UTC (9+ messages)
` [PATCH v2 1/8] dma-buf/dma-fence: Add dma_fence_test_signaled_flag()
` [PATCH v2 2/8] dma-buf/dma-fence: Add dma_fence_check_and_signal()
` [PATCH v2 3/8] amd/amdkfd: Use dma_fence_check_and_signal()
` [PATCH v2 4/8] drm/xe: Use dma_fence_check_and_signal_locked()
` [PATCH v2 6/8] drm/ttm: Use dma_fence_check_and_signal()
` [PATCH v2 7/8] dma-buf/dma-fence: Remove return code of signaling-functions
` [PATCH v2 8/8] drm/xe: Use dma_fence_test_signaled_flag()
[PATCH 0/6] dma-fence: Remove return code of dma_fence_signal() et al
2025-11-28 20:01 UTC (24+ messages)
` [PATCH 1/6] dma-buf/dma-fence: Add dma_fence_test_signaled_flag()
` [PATCH 2/6] amd/amdkfd: Ignore return code of dma_fence_signal()
` [PATCH 3/6] drm/gpu/xe: Ignore dma_fenc_signal() return code
` [PATCH 4/6] dma-buf: Don't misuse dma_fence_signal()
` [PATCH 5/6] drm/ttm: Remove return check of dma_fence_signal()
[PATCH 0/3] Unload linux/kernel.h
2025-12-01 10:16 UTC (28+ messages)
` [PATCH 1/3] kernel.h: drop STACK_MAGIC macro
` [PATCH 2/3] kernel.h: move VERIFY_OCTAL_PERMISSIONS() to sysfs.h
` [PATCH 3/3] tracing: move tracing declarations from kernel.h to a dedicated header
` ✗ LGCI.VerificationFailed: failure for Unload linux/kernel.h
` ✗ LGCI.VerificationFailed: failure for Unload linux/kernel.h (rev2)
[PATCH v1] drm: i915: gt: intel_rps: handle counter overflow by calculating delta for each register
2025-11-29 3:29 UTC
[PATCH v2 0/5] drm/i915/display: switch from intel_wakeref_t to struct ref_tracker *
2025-12-01 13:38 UTC (14+ messages)
` [PATCH v2 1/5] drm/i915/pps: drop wakeref parameter from with_intel_pps_lock()
` [PATCH v2 2/5] drm/i915/pps: convert intel_wakeref_t to struct ref_tracker *
` [PATCH v2 3/5] drm/i915/power: drop wakeref parameter from with_intel_display_power*()
` [PATCH v2 4/5] drm/i915/power: convert intel_wakeref_t to struct ref_tracker *
` [PATCH v2 5/5] drm/{i915,xe}/display: drop intel_wakeref.h usage
[PATCH v10 00/10] drm: Reduce page tables overhead with THP
2025-12-01 13:27 UTC (23+ messages)
` [PATCH v10 01/10] drm/shmem-helper: Simplify page offset calculation in fault handler
` [PATCH v10 02/10] drm/shmem-helper: Map huge pages "
` [PATCH v10 03/10] drm/gem: Introduce drm_gem_get_unmapped_area() fop
` [PATCH v10 04/10] drm/gem: Add huge tmpfs mountpoint helpers
` [PATCH v10 05/10] drm/i915: Use "
` [PATCH v10 06/10] drm/v3d: "
` [PATCH v10 07/10] drm/gem: Get rid of *_with_mnt helpers
` [PATCH v10 08/10] drm/panthor: Introduce huge tmpfs mountpoint option
` [PATCH v10 09/10] drm/panfrost: "
` [PATCH v10 10/10] Documentation/gpu/drm-mm: Add THP paragraph to GEM mapping section
` ✗ i915.CI.BAT: failure for drm: Reduce page tables overhead with THP (rev7)
[PATCH v3 0/3] Selective Fetch and async flip
2025-12-01 13:24 UTC (4+ messages)
` [PATCH v3 1/3] drm/i915/psr: Set plane id bit in crtc_state->async_flip_planes for PSR
` [PATCH v3 2/3] drm/i915/psr: Perform full frame update on async flip
` [PATCH v3 3/3] drm/i915/psr: Allow async flip when Selective Fetch enabled
[PATCH 0/2] switch to use kernel standard fault injection in i915
2025-12-01 13:05 UTC (3+ messages)
` [PATCH 1/2] drm/i915: switch to use kernel standard error injection
` [PATCH 2/2] drm/i915: Add intel_gvt_driver_remove() onto error cleanup path
[PATCH 0/2] witch to use kernel standard fault injection in i915
2025-12-01 12:06 UTC (4+ messages)
` [PATCH 1/2] drm/i915: switch to use kernel standard error injection
` [PATCH 2/2] drm/i915: Add intel_gvt_driver_remove() onto error cleanup path
` ✗ Fi.CI.BUILD: failure for witch to use kernel standard fault injection in i915
[PATCH 0/4] Selective Fetch and async flip
2025-12-01 11:36 UTC (7+ messages)
` [PATCH 2/4] drm/i915/psr: Perform vblank evasion on async flip as well for PSR
[PATCH v2 0/3] Selective Fetch and async flip
2025-12-01 11:36 UTC (5+ messages)
` [PATCH v2 1/3] drm/i915/psr: Set plane id bit in crtc_state->async_flip_planes for PSR
` [PATCH v2 2/3] drm/i915/psr: Perform full frame update on async flip
` [PATCH v2 3/3] drm/i915/psr: Allow async flip when Selective Fetch enabled
` ✗ Fi.CI.BUILD: failure for Selective Fetch and async flip (rev2)
[PATCH 0/8] Move PSR/Panel Replay sink data into intel_connector
2025-12-01 11:23 UTC (18+ messages)
` [PATCH 1/8] drm/i915/psr: Add panel granularity information "
` [PATCH 2/8] drm/i915/psr: Use SU granularity information available in intel_connector
` [PATCH 3/8] drm/i915/psr: Compute Panel Replay/Adaptive coexistence behavior
` [PATCH 4/8] drm/i915/psr: Move pr_dpcd and psr_dpcd to intel_connector
` [PATCH 5/8] drm/i915/psr: Clear pr_dpcd as well on disconnect
` [PATCH 6/8] drm/i915/psr: Move Panel Replay DSC sink support data to intel_connector
` [PATCH 7/8] drm/i915/psr: Move sink PSR and Panel Replay booleans "
` [PATCH 8/8] drm/i915/psr: Move sink_sync_latency "
[PATCH v9 00/20] Display Global Histogram
2025-12-01 10:41 UTC (22+ messages)
` [PATCH v9 01/20] DO_NOT_REVIEW: plane/crtc color pipeline
` [PATCH v9 02/20] drm: Define histogram structures exposed to user
` [PATCH v9 03/20] drm: Add new element histogram for colorop
` [PATCH v9 04/20] drm/colorop: Export function to create pipeline element histogram
` [PATCH v9 05/20] drm: Define ImageEnhancemenT LUT structures exposed to user
` [PATCH v9 06/20] drm: Add new element Image EnhancemenT for colorop
` [PATCH v9 07/20] drm/colorop: Export function to create pipeline element iet lut
` [PATCH v9 08/20] drm/i915/histogram: Define registers for histogram
` [PATCH v9 09/20] drm/i915/histogram: Add support "
` [PATCH v9 10/20] drm/xe: Add histogram support to Xe builds
` [PATCH v9 11/20] drm/i915/histogram: histogram interrupt handling
` [PATCH DO_NOT_RTEVIEW v9 12/20] Plane Color Pipeline support for Intel platforms
` [PATCH v9 13/20] drm/i915/colorop: Add crtc color pipeline for i915
` [PATCH v9 14/20] drm/i915/histogram: Hook i915 histogram with drm histogram
` [PATCH v9 15/20] drm/i915/iet: Add support to writing the IET LUT data
` [PATCH v9 16/20] drm/i915/colorop: create IET LUT properties
` [PATCH v9 17/20] drm/i915/crtc: Hook i915 IET LUT with the drm IET properties
` [PATCH v9 18/20] drm/i915/histogram: histogram delay counter doesn't reset
` [PATCH v9 19/20] drm/i915/histogram: Histogram changes for Display 20+
` [PATCH v9 20/20] drm/i915/histogram: Enable pipe dithering
` ✗ Fi.CI.BUILD: failure for Display Global Histogram (rev14)
[PATCH 00/50] drm/i915/dp: Clean up link BW/DSC slice config computation
2025-12-01 9:46 UTC (5+ messages)
` [CI 09/50] drm/i915/dp: Use the effective data rate for DP compressed BW calculation
` ✗ i915.CI.BAT: failure for drm/i915/dp: Clean up link BW/DSC slice config computation
` ✗ i915.CI.Full: "
[v7 00/15] Plane Color Pipeline support for Intel platforms
2025-12-01 9:26 UTC (26+ messages)
` [v7 01/15] drm/i915/display: Add identifiers for driver specific blocks
` [v7 02/15] drm/i915: Add intel_color_op
` [v7 03/15] drm/i915/color: Add helper to create intel colorop
` [v7 04/15] drm/i915/color: Create a transfer function color pipeline
` [v7 05/15] drm/i915/color: Add framework to program CSC
` [v7 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero
` [v7 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond
` [v7 08/15] drm/i915: Add register definitions for Plane Degamma
` [v7 09/15] drm/i915: Add register definitions for Plane Post CSC
` [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT
` [v7 11/15] drm/i915/color: Program Pre-CSC registers
` [v7 12/15] drm/i915/xelpd: Program Plane Post CSC Registers
` [v7 13/15] drm/i915/display: Add registers for 3D LUT
` [v7 14/15] drm/i915/color: Add 3D LUT to color pipeline
` [v7 15/15] drm/i915/color: Enable Plane Color Pipelines
` ✓ i915.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev7)
` ✗ i915.CI.Full: failure "
[PULL] topic/xe-vfio
2025-12-01 9:09 UTC
[PATCH v5 00/17] Add new general DRM property "color format"
2025-12-01 7:40 UTC (21+ messages)
` [PATCH v5 01/17] drm/amd/display: Remove unnecessary SIGNAL_TYPE_HDMI_TYPE_A check
` [PATCH v5 02/17] drm: Add new general DRM property "color format"
` [PATCH v5 03/17] drm: Add enum conversion from DRM_COLOR_FORMAT to HDMI_COLORSPACE
` [PATCH v5 04/17] drm/bridge: Act on the DRM color format property
` [PATCH v5 05/17] drm/display: hdmi-state-helper: Act on color format DRM property
` [PATCH v5 06/17] drm/display: hdmi-state-helper: Try subsampling in mode_valid
` [PATCH v5 07/17] drm/i915: Implement the "color format" DRM property
` [PATCH v5 08/17] drm/amdgpu: Implement "
` [PATCH v5 09/17] drm/rockchip: Add YUV422 output mode constants for VOP2
` [PATCH v5 10/17] drm/rockchip: vop2: Fix YUV444 output
` [PATCH v5 11/17] drm/rockchip: vop2: Add RK3576 to the RG swap special case
` [PATCH v5 12/17] drm/rockchip: vop2: Recognise 10/12-bit YUV422 as YUV formats
` [PATCH v5 13/17] drm/rockchip: vop2: Set correct output format for RK3576 YUV422
` [PATCH v5 14/17] drm/rockchip: dw_hdmi_qp: Implement "color format" DRM property
` [PATCH v5 15/17] drm/rockchip: dw_hdmi_qp: Set supported_formats platdata
` [PATCH v5 16/17] drm/connector: Register color format property on HDMI connectors
` [PATCH v5 17/17] drm/tests: hdmi: Add tests for the color_format property
` ✓ i915.CI.BAT: success for Add new general DRM property "color format" (rev2)
` ✗ i915.CI.Full: failure "
` ✗ Fi.CI.CHECKPATCH: warning "
[PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC
2025-12-01 6:56 UTC (4+ messages)
` ✗ i915.CI.BAT: failure for drm/i915/display: Enable system cache support for FBC (rev4)
` ✓ i915.CI.BAT: success "
` ✗ i915.CI.Full: failure "
[PATCH v9 00/11] drm: Reduce page tables overhead with THP
2025-11-28 18:41 UTC (7+ messages)
` [PATCH v9 05/11] drm/i915: Use huge tmpfs mountpoint helpers
` [PATCH v9 06/11] drm/v3d: "
[PATCH] i915/display/intel_ddi: Reduce severity of failed FEC enabling
2025-11-28 15:59 UTC (3+ messages)
` ✓ i915.CI.Full: success for i915/display/intel_ddi: Reduce severity of failed FEC enabling (rev2)
Question about the GTDRIVER_MAILBOX_DATA0 register in Gen 12.0 (Tiger Lake)
2025-11-28 14:08 UTC (3+ messages)
[PATCH v9 00/17] Enable/Disable DC balance along with VRR DSB
2025-11-28 13:35 UTC (15+ messages)
` [PATCH v9 01/17] drm/i915/display: Add source param for dc balance
` [PATCH v9 07/17] drm/i915/vrr: Add compute config for DC Balance params
` [PATCH v9 08/17] drm/i915/vrr: Add function to reset DC balance accumulated params
` [PATCH v9 09/17] drm/i915/display: Add DC Balance flip count operations
` [PATCH v9 10/17] drm/i915/vrr: Write DC balance params to hw registers
` [PATCH v9 13/17] drm/i915/display: Wait for VRR PUSH status update
[PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-28 11:35 UTC (2+ messages)
` [PATCH v5 "
[PATCH v2] drm/i915/selftests: Defer signalling the request fence
2025-11-28 11:28 UTC (2+ messages)
[RESEND 0/4] drm/{i915,xe}/dsb: refactor DSB buffer allocation
2025-11-28 9:36 UTC (4+ messages)
` [RESEND 1/4] drm/{i915, xe}/dsb: make {intel, xe}_dsb_buffer.c independent of display
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