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 messages from 2026-03-12 08:07:03 to 2026-03-16 16:03:55 UTC [more...]

[PATCH 0/2] drm: Fix namespace clashes with 'pixel_format'
 2026-03-16  8:52 UTC  (3+ messages)
` [PATCH 1/2] drm/i915/gvt: Rename struct 'pixel_format' to 'gvt_pixel_format'

[PATCH 00/10] drm/i915/color: Enable SDR plane color pipeline
 2026-03-16 16:03 UTC  (9+ messages)
` [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[PATCH 00/61] treewide: Use IS_ERR_OR_NULL over manual NULL check - refactor
 2026-03-16 13:30 UTC  (7+ messages)
  ` [PATCH 49/61] media: Prefer IS_ERR_OR_NULL over manual NULL check
  ` [PATCH 38/61] net: "
  ` [PATCH 48/61] mtd: "
  ` [PATCH 02/61] btrfs: "
  ` [PATCH 50/61] iommu: "

[PATCH v9 00/23] gpu: nova-core: Add memory management support
 2026-03-16 13:19 UTC  (14+ messages)
` [PATCH v9 01/23] gpu: nova-core: Select GPU_BUDDY for VRAM allocation
` [PATCH v9 02/23] gpu: nova-core: Kconfig: Sort select statements alphabetically
` [PATCH v9 03/23] gpu: nova-core: gsp: Return GspStaticInfo from boot()
` [PATCH v9 04/23] gpu: nova-core: gsp: Extract usable FB region from GSP
` [PATCH v9 05/23] gpu: nova-core: gsp: Expose total physical VRAM end from FB region info

[PATCH v12 0/1] Rust GPU buddy allocator bindings
 2026-03-16 13:12 UTC  (5+ messages)
` [PATCH v12.1 "
  ` [PATCH v12.1 1/1] rust: gpu: Add "

[PATCH] drm/i915/fbdev: fix link failure without FBDEV emulation
 2026-03-16 12:18 UTC  (3+ messages)

[CI] drm/i915/display: change pipe allocation order for discrete platforms
 2026-03-16 12:18 UTC 

[CI 0/5] drm/{i915, xe}: prep for sorting out step enums between the drivers
 2026-03-16 12:15 UTC  (6+ messages)
` [CI 1/5] drm/i915/dmc: simplify stepping info initialization
` [CI 2/5] drm/i915/display: add step name in display runtime info
` [CI 3/5] drm/i915/dmc: use step name from "
` [CI 4/5] drm/xe/compat: remove intel_step_name macro
` [CI 5/5] drm/intel: add shared step.h and switch i915 to use it

[PATCH 0/2] drm/i915/dmc: Update PIPEDMC interrupt mask
 2026-03-16 12:13 UTC  (15+ messages)
` [PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
` [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[PATCH 0/2] PSR parameters handling fixes
 2026-03-16 11:28 UTC  (8+ messages)
` [PATCH 1/2] drm/i915/psr: Disable PSR on update_m_n and update_lrr
` [PATCH 2/2] drm/i915/psr: Compute psr_entry_setup_frames into intel_crtc_state
` ✓ i915.CI.BAT: success for PSR parameters handling fixes
` ✗ i915.CI.Full: failure "

[PULL] drm-intel-next
 2026-03-16 10:34 UTC 

[PATCH] drm/i915/xelpdp/tc: Convert TCSS power check WARN to a debug message
 2026-03-16  9:30 UTC 

[PATCH] drm/i915/backlight: Check if VESA backlight is possible
 2026-03-16  9:07 UTC  (6+ messages)
` [PATCH v2] "
` ✓ i915.CI.BAT: success for drm/i915/backlight: Check if VESA backlight is possible (rev2)
` ✓ i915.CI.Full: "

[PATCH v3 0/7] Refactor drm_writeback_connector structure
 2026-03-16  8:30 UTC  (8+ messages)
` [PATCH v3 1/7] drm: writeback: "
` [PATCH v3 2/7] drm: writeback: Modify writeback init helpers
` [PATCH v3 3/7] drm: writeback: Modify drm_writeback_queue_job params
` [PATCH v3 4/7] drm: writeback: Modify drm_writeback_signal_completion param
` [PATCH v3 5/7] drm: writeback: Modify params for drm_writeback_get_out_fence
` [PATCH v3 6/7] drm/connector: Modify prepare_writeback_job helper
` [PATCH v3 7/7] drm/connector: Modify cleanup_writeback_job helper

[PATCH v2 0/2] drm/colorop: Keep colorop state consistent across atomic commits
 2026-03-16  7:29 UTC  (7+ messages)
` [PATCH v2 1/2] drm/colorop: Preserve bypass value in duplicate_state()
` [PATCH v2 2/2] drm/atomic: Add affected colorops with affected planes

[PATCH v12 0/1] rust: interop: Add list module for C linked list interface
 2026-03-16  4:34 UTC  (8+ messages)
` [PATCH v12 1/1] "

[PATCH v3 00/12] CMTG enablement
 2026-03-14 21:26 UTC  (15+ messages)
` [PATCH v3 01/12] drm/i915/cmtg: add is_enable_allowed() for cmtg
` [PATCH v3 02/12] drm/i915/cmtg: set CMTG clock select
` [PATCH v3 03/12] drm/i915/cmtg: set timings for CMTG
` [PATCH v3 04/12] drm/i915/cmtg: program VRR registers of CMTG
` [PATCH v3 05/12] drm/i915/cmtg: set transcoder mn for CMTG
` [PATCH v3 06/12] drm/i915/cmtg: add hook to enable CMTG with sync to port
` [PATCH v3 07/12] drm/i915/cmtg: add a hook to enable ddi for CMTG
` [PATCH v3 08/12] drm/i915/cmtg: modify existing hook to disable CMTG
` [PATCH v3 09/12] drm/i915/cmtg: Add trigger to enable/disable cmtg
` [PATCH v3 10/12] drm/i915/cmtg: Add CMTG interrupt handling
` [PATCH v3 11/12] drm/i915/cmtg: set dc3co_enable flag for lobf/psr2/pr-alpm
` [PATCH v3 12/12] drm/i915/cmtg: disable CMTG if dc3co entry condition not met
` ✓ i915.CI.BAT: success for CMTG enablement (rev3)
` ✓ i915.CI.Full: "

[PATCH 0/2] Disable Panel Replay as quirk for LGD panel
 2026-03-14 14:23 UTC  (7+ messages)
` [PATCH 1/2] drm/dp: Add quirk to disable Panel Replay on certain panels
` [PATCH 2/2] drm/i915/psr: Disable Panel Replay on DP_DPCD_QUIRK_NO_PANEL_REPLAY quirk
` ✓ i915.CI.BAT: success for Disable Panel Replay as quirk for LGD panel
` ✓ i915.CI.Full: "

[PATCH 0/3] drm/i915/de: Move register polling into display code
 2026-03-14 13:30 UTC  (10+ messages)
` [PATCH 1/3] drm/i915/de: Introduce intel_de.c and move intel_de_{read, write}8() there
` [PATCH 2/3] drm/i915/de: Move intel_de_wait*() into intel_de.c
` [PATCH 3/3] drm/i915/de: Implement register polling in the display code
` ✓ i915.CI.BAT: success for drm/i915/de: Move register polling into "
` ✗ i915.CI.Full: failure "

[PATCH] drm/i915: Order OP vs. timeout correctly in __wait_for()
 2026-03-14 12:28 UTC  (3+ messages)
` ✓ i915.CI.BAT: success for "
` ✗ i915.CI.Full: failure "

[PATCH] drm/display: Increase DP_RECEIVER_CAP_SIZE from 15 to 16 bytes
 2026-03-14  5:56 UTC  (4+ messages)
` [PATCH v2] "
` ✓ i915.CI.BAT: success for drm/display: Increase DP_RECEIVER_CAP_SIZE from 15 to 16 bytes (rev2)
` ✓ i915.CI.Full: "

[PATCH] drm/i915/gt: Check set_default_submission() before deferencing
 2026-03-13 16:34 UTC  (2+ messages)

[PATCH 1/2] drm/i915/cx0: Clear response ready & error bit
 2026-03-13 15:41 UTC  (2+ messages)

[PATCH v3 0/2] drm/i915/dmc: Update PIPEDMC interrupt mask
 2026-03-13 14:52 UTC  (7+ messages)
` [PATCH v3 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
` [PATCH v3 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
` ✓ i915.CI.BAT: success for drm/i915/dmc: Update PIPEDMC interrupt mask (rev3)
` ✗ i915.CI.Full: failure "

[PATCH i-g-t v2 0/3] tests/intel/gem_lmem_swapping: Expect gem leak helper crashes
 2026-03-13 14:47 UTC  (6+ messages)
` [PATCH i-g-t v2 1/3] tests/gem_lmem_swapping: Improve concurrency of smem-oom helpers
` [PATCH i-g-t v2 2/3] tests/intel/gem_lmem_swapping: Be more clear about subprocesses role
` [PATCH i-g-t v2 3/3] tests/intel/gem_lmem_swapping: Expect gem leak helper crashes

[PATCH 1/2] drm/i915/dp_mst: Fix forced link retrain handling in MST HPD IRQ handler
 2026-03-13 13:01 UTC  (3+ messages)
` ✓ i915.CI.Full: success for series starting with [1/2] "

[PATCH v3 0/2] drm/i915/dmc: Update PIPEDMC interrupt mask/
 2026-03-13 12:58 UTC  (6+ messages)
` [PATCH v3 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
` [PATCH v3 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
` ✓ i915.CI.BAT: success for drm/i915/dmc: Update PIPEDMC interrupt mask/
` ✗ i915.CI.Full: failure "

[PATCH 00/19] Fix Adaptive Sync SDP for PR with Link ON + Auxless ALPM
 2026-03-13 12:42 UTC  (21+ messages)
` [PATCH 01/19] drm/dp: Rename and relocate AS SDP payload field masks
` [PATCH 02/19] drm/dp: Clean up DPRX feature enumeration macros
` [PATCH 03/19] drm/dp: Add bits for AS SDP FAVT Payload Fields Parsing support
` [PATCH 04/19] drm/dp: Add DPCD for configuring AS SDP for PR + VRR
` [PATCH 10/19] drm/i915/dp: Use revision field of AS SDP data structure
` [PATCH 11/19] drm/i915/dp: Add member to intel_dp to store AS SDP v2 support
` [PATCH 12/19] drm/i915/psr: Write the PR config DPCDs in burst mode
` [PATCH 13/19] drm/i915/display: Add helper for AS SDP transmission time selection
` [PATCH 16/19] drm/i915/dp: Program AS SDP DB[1:0] for PR with Link off
` [PATCH 18/19] drm/i915/dp: Make provision for AS SDP version 1

[PATCH v7 24/26] PREEMPT_RT injection
 2026-03-13  9:36 UTC  (2+ messages)

[PATCH v7 0/3] Panel Replay BW optimization
 2026-03-13  7:57 UTC  (17+ messages)
` [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support
` [PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
` [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization
` ✓ i915.CI.Full: success for Panel Replay BW optimization

[PATCH v3 00/24] Refactor LT PHY PLL handling to use DPLL framework
 2026-03-13  7:21 UTC  (3+ messages)
` ✓ i915.CI.BAT: success for Refactor LT PHY PLL handling to use DPLL framework (rev7)
` ✗ i915.CI.Full: failure "

[PATCH 0/5] drm/{i915,xe}: move bo stuff to parent interface
 2026-03-13  5:12 UTC  (5+ messages)
` [PATCH 5/5] drm/{i915,xe}: move framebuffer bo "
    ` [PATCH 5/5] drm/{i915, xe}: "

[PATCH] drm/i915/hdcp: Take force_hdcp14 into account during check_link
 2026-03-13  2:47 UTC  (3+ messages)
` ✗ i915.CI.Full: failure for drm/i915/hdcp: Take force_hdcp14 into account during check_link (rev3)

[PULL] drm-rust-fixes 2026-03-12
 2026-03-12 22:42 UTC 

[PULL] drm-xe-next
 2026-03-12 14:57 UTC 

[PATCH] drm/i915/dp: ALPM init to be done after DPCD init
 2026-03-12 11:43 UTC  (3+ messages)
` [PATCHv6] drm/i915/dp: Read ALPM caps "

[PATCH v7 00/26] drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe
 2026-03-12 11:38 UTC  (8+ messages)
` [PATCH v7 26/26] drm/i915/gt: Add a spinlock to prevent starvation of irq_work

[PATCH 0/3] Make casf updates atomic and dsb ready
 2026-03-12 11:19 UTC  (3+ messages)
` [PATCH 3/3] drm/i915/display: Common wrapper for casf and pfit

[CI v3 00/24] Refactor LT PHY PLL handling to use DPLL framework
 2026-03-12 10:14 UTC  (26+ messages)
` [CI v3 01/24] drm/i915/lt_phy: Dump missing PLL state parameters
` [CI v3 02/24] drm/i915/lt_phy: Add check if PLL is enabled
` [CI v3 03/24] drm/i915/lt_phy: Add PLL information for xe3plpd
` [CI v3 04/24] drm/i915/lt_phy: Refactor LT PHY PLL handling to use explicit PLL state
` [CI v3 05/24] drm/i915/lt_phy: Add lane_count to "
` [CI v3 06/24] drm/i915/lt_phy: Add xe3plpd .compute_dplls hook
` [CI v3 07/24] drm/i915/lt_phy: Add xe3plpd .get_dplls hook
` [CI v3 08/24] drm/i915/lt_phy: Add xe3plpd .put_dplls hook
` [CI v3 09/24] drm/i915/lt_phy: Add xe3plpd .update_active_dpll hook
` [CI v3 10/24] drm/i915/lt_phy: Add xe3plpd .update_dpll_ref_clks hook
` [CI v3 11/24] drm/i915/lt_phy: Add xe3plpd .dump_hw_state hook
` [CI v3 12/24] drm/i915/lt_phy: Add xe3plpd .compare_hw_state hook
` [CI v3 13/24] drm/i915/lt_phy: Add xe3plpd .get_hw_state hook
` [CI v3 14/24] drm/i915/lt_phy: Add xe3plpd .get_freq hook
` [CI v3 15/24] drm/i915/lt_phy: Add xe3plpd .crtc_get_dpll
` [CI v3 16/24] drm/i915/lt_phy: Add .enable_clock hook on DDI
` [CI v3 17/24] drm/i915/lt_phy: Add .disable_clock "
` [CI v3 18/24] drm/i915/lt_phy: Dump lane count for HW state
` [CI v3 19/24] drm/i915/lt_phy: Readout lane count
` [CI v3 20/24] drm/i915/lt_phy: Get encoder configuration for xe3plpd platform
` [CI v3 21/24] drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks
` [CI v3 22/24] drm/i915/lt_phy: Remove LT PHY specific state verification
` [CI v3 23/24] drm/i915/lt_phy: Enable dpll framework for xe3plpd
` [CI v3 24/24] drm/i915/lt_phy: Replace crtc compute clock

[PATCH v3 23/24] drm/i915/lt_phy: Enable dpll framework for xe3plpd
 2026-03-12  9:28 UTC  (2+ messages)
` [CI "

[PATCH] drm/i915/display: fail compilation on intel_display_wa() with invalid enums
 2026-03-12  9:12 UTC  (4+ messages)
` ✗ i915.CI.BAT: failure for "

[PULL] drm-intel-gt-next
 2026-03-12  9:02 UTC 

[PULL] drm-intel-fixes
 2026-03-12  8:54 UTC 

[PATCH v5 00/16] drm/i915/display: convert a bunch of W/A checks to the new framework
 2026-03-12  8:11 UTC  (5+ messages)
` [PATCH v5 01/16] drm/i915/display: remove enum macro magic in intel_display_wa()


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