From: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>,
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Change terminology for cdclk actions
Date: Tue, 25 Oct 2022 23:11:21 +0530 [thread overview]
Message-ID: <Y1gfwSUEsnJl41py@bala-ubuntu> (raw)
In-Reply-To: <20221021213948.516041-2-anusha.srivatsa@intel.com>
On 21.10.2022 14:39, Anusha Srivatsa wrote:
> No functional changes. Changing terminolgy in some
> print statements. s/has_cdclk_squasher/has_cdclk_squash,
> s/crawler/crawl and s/squasher/squash.
>
> Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index ad401357ab66..0f5add2fc51b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1220,7 +1220,7 @@ static void skl_cdclk_uninit_hw(struct drm_i915_private *dev_priv)
> skl_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE);
> }
>
> -static bool has_cdclk_squasher(struct drm_i915_private *i915)
> +static bool has_cdclk_squash(struct drm_i915_private *i915)
> {
> return IS_DG2(i915);
> }
> @@ -1520,7 +1520,7 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv,
> return;
> }
>
> - if (has_cdclk_squasher(dev_priv))
> + if (has_cdclk_squash(dev_priv))
> squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL);
>
> if (squash_ctl & CDCLK_SQUASH_ENABLE) {
> @@ -1747,7 +1747,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> else
> clock = cdclk;
>
> - if (has_cdclk_squasher(dev_priv)) {
> + if (has_cdclk_squash(dev_priv)) {
> u32 squash_ctl = 0;
>
> if (waveform)
> @@ -1845,7 +1845,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
> expected = skl_cdclk_decimal(cdclk);
>
> /* Figure out what CD2X divider we should be using for this cdclk */
> - if (has_cdclk_squasher(dev_priv))
> + if (has_cdclk_squash(dev_priv))
> clock = dev_priv->display.cdclk.hw.vco / 2;
> else
> clock = dev_priv->display.cdclk.hw.cdclk;
> @@ -1976,7 +1976,7 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> * the moment all platforms with squasher use a fixed cd2x
> * divider.
> */
> - if (!has_cdclk_squasher(dev_priv))
> + if (!has_cdclk_squash(dev_priv))
> return false;
>
> return a->cdclk != b->cdclk &&
> @@ -2028,7 +2028,7 @@ static bool intel_cdclk_can_cd2x_update(struct drm_i915_private *dev_priv,
> * the moment all platforms with squasher use a fixed cd2x
> * divider.
> */
> - if (has_cdclk_squasher(dev_priv))
> + if (has_cdclk_squash(dev_priv))
> return false;
>
> return a->cdclk != b->cdclk &&
> @@ -2754,12 +2754,12 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
> &old_cdclk_state->actual,
> &new_cdclk_state->actual)) {
> drm_dbg_kms(&dev_priv->drm,
> - "Can change cdclk via squasher\n");
> + "Can change cdclk via squashing\n");
> } else if (intel_cdclk_can_crawl(dev_priv,
> &old_cdclk_state->actual,
> &new_cdclk_state->actual)) {
> drm_dbg_kms(&dev_priv->drm,
> - "Can change cdclk via crawl\n");
> + "Can change cdclk via crawling\n");
> } else if (pipe != INVALID_PIPE) {
> new_cdclk_state->pipe = pipe;
>
> --
> 2.25.1
>
next prev parent reply other threads:[~2022-10-25 17:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-21 21:39 [Intel-gfx] [PATCH 0/4] Prep series - CDCLK code churn Anusha Srivatsa
2022-10-21 21:39 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Change terminology for cdclk actions Anusha Srivatsa
2022-10-25 17:41 ` Balasubramani Vivekanandan [this message]
2022-10-21 21:39 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Introduce HAS_CDCLK_SQUASH macro Anusha Srivatsa
2022-10-25 17:42 ` Balasubramani Vivekanandan
2022-10-21 21:39 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: Move chunks of code out of bxt_set_cdclk() Anusha Srivatsa
2022-10-25 17:43 ` Balasubramani Vivekanandan
2022-10-21 21:39 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Move squash_ctl register programming to its own function Anusha Srivatsa
2022-10-25 17:44 ` Balasubramani Vivekanandan
2022-10-21 22:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Prep series - CDCLK code churn (rev2) Patchwork
2022-10-21 22:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-10-25 18:29 [Intel-gfx] [PATCH 1/4] drm/i915/display: Change terminology for cdclk actions Anusha Srivatsa
2022-10-21 0:20 [Intel-gfx] [PATCH 0/4] Prep series - CDCLK code churn Anusha Srivatsa
2022-10-21 0:20 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Change terminology for cdclk actions Anusha Srivatsa
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