From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Animesh Manna <animesh.manna@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/pps: Enable 2nd pps for dual EDP scenario
Date: Wed, 9 Nov 2022 12:11:31 +0200 [thread overview]
Message-ID: <Y2t80/UUH/EwhrLa@intel.com> (raw)
In-Reply-To: <20221108211822.28048-2-animesh.manna@intel.com>
On Wed, Nov 09, 2022 at 02:48:21AM +0530, Animesh Manna wrote:
> >From display gen12 onwards to support dual EDP two instances of pps added.
> Currently backlight controller and pps instance can be mapped together
> for a specific panel. Extended support for gen12 for dual EDP usage.
>
> v1: Iniital revision
> v2: Called intel_bios_panel_init w/o PNPID before intel_pps_init. [Jani]
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 7 -------
> drivers/gpu/drm/i915/display/intel_bios.h | 7 +++++++
> drivers/gpu/drm/i915/display/intel_dp.c | 9 ++++++---
> drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
> 4 files changed, 14 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index c2987f2c2b2e..fca44be9bab8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -706,13 +706,6 @@ static int fallback_get_panel_type(struct drm_i915_private *i915,
> return 0;
> }
>
> -enum panel_type {
> - PANEL_TYPE_OPREGION,
> - PANEL_TYPE_VBT,
> - PANEL_TYPE_PNPID,
> - PANEL_TYPE_FALLBACK,
> -};
> -
> static int get_panel_type(struct drm_i915_private *i915,
> const struct intel_bios_encoder_data *devdata,
> const struct edid *edid)
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
> index e375405a7828..da01b13260ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -231,6 +231,13 @@ struct mipi_pps_data {
> u16 panel_power_cycle_delay;
> } __packed;
>
> +enum panel_type {
> + PANEL_TYPE_OPREGION,
> + PANEL_TYPE_VBT,
> + PANEL_TYPE_PNPID,
> + PANEL_TYPE_FALLBACK,
> +};
> +
> void intel_bios_init(struct drm_i915_private *dev_priv);
> void intel_bios_init_panel(struct drm_i915_private *dev_priv,
> struct intel_panel *panel,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7400d6b4c587..08ece347f7cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5254,6 +5254,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
> return false;
> }
>
> + intel_bios_init_panel(dev_priv, &intel_connector->panel,
> + encoder->devdata, NULL);
> +
> intel_pps_init(intel_dp);
>
> /* Cache DPCD and EDID for edp. */
> @@ -5288,9 +5291,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
> edid = ERR_PTR(-ENOENT);
> }
> intel_connector->edid = edid;
> -
> - intel_bios_init_panel(dev_priv, &intel_connector->panel,
> - encoder->devdata, IS_ERR(edid) ? NULL : edid);
> + if (intel_connector->panel.vbt.panel_type == PANEL_TYPE_FALLBACK)
vbt.panel_type does _not_ contain enum panel_type (a bit of an
unfortunate name selection by me there I guess).
> + intel_bios_init_panel(dev_priv, &intel_connector->panel,
> + encoder->devdata, IS_ERR(edid) ? NULL : edid);
I suspect just calling this twice might leak all kinds of stuff.
>
> intel_panel_add_edid_fixed_modes(intel_connector, true);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 3949fb449353..0975e49f8d03 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -1430,7 +1430,7 @@ void intel_pps_init(struct intel_dp *intel_dp)
> intel_dp->pps.initializing = true;
> INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
>
> - if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> + if (IS_GEMINILAKE(i915) || IS_BROXTON(i915) || DISPLAY_VER(i915) >= 12)
> intel_dp->get_pps_idx = bxt_power_sequencer_idx;
> else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> intel_dp->get_pps_idx = vlv_power_sequencer_pipe;
> --
> 2.29.0
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2022-11-09 10:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-08 21:18 [Intel-gfx] [PATCH 1/3] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Animesh Manna
2022-11-08 21:18 ` [Intel-gfx] [PATCH 2/3] drm/i915/pps: Enable 2nd pps for dual EDP scenario Animesh Manna
2022-11-09 10:11 ` Ville Syrjälä [this message]
2022-11-09 10:25 ` Jani Nikula
2022-11-09 10:29 ` Ville Syrjälä
2022-11-09 10:41 ` Jani Nikula
2022-11-09 11:09 ` Manna, Animesh
2022-11-08 21:18 ` [Intel-gfx] [PATCH 3/3] drm/i915/edp: Fix warning as vdd went down without driver knowledge Animesh Manna
2022-11-09 9:55 ` Jani Nikula
2022-11-09 10:52 ` Manna, Animesh
2022-11-08 21:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup Patchwork
2022-11-08 22:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-09 4:05 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-11-09 10:12 ` [Intel-gfx] [PATCH 1/3] " Ville Syrjälä
-- strict thread matches above, loose matches on Subject: below --
2022-11-09 11:15 Animesh Manna
2022-11-09 11:15 ` [Intel-gfx] [PATCH 2/3] drm/i915/pps: Enable 2nd pps for dual EDP scenario Animesh Manna
2022-11-09 11:42 ` Jani Nikula
2022-11-09 13:54 ` Manna, Animesh
2022-11-09 14:04 ` Jani Nikula
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