Re: [Intel-gfx] [PATCH] Copy highest enabled wm level to disabled wm levels for gen >= 12

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Dec 19, 2022 at 09:29:19AM +0200, Stanislav Lisovskiy wrote:
> There was a specific SW workaround requested, which should prevent
> some watermark issues happening, which requires copying highest
> enabled wm level to those disabled wm levels(bit 31 is of course
> still needs to be cleared).
> 
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index ae4e9e680c2e3..b12e11cd6e579 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -1591,6 +1591,13 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
>  				wm->wm[level].lines = wm->wm[0].lines;
>  				wm->wm[level].ignore_lines = wm->wm[0].ignore_lines;
>  			}
> +
> +			/* Wa_14017887344 */
> +			if (DISPLAY_VER(i915) >= 12 && level > 0) {
> +				wm->wm[level].blocks = wm->wm[level - 1].blocks;
> +				wm->wm[level].lines = wm->wm[level - 1].lines;
> +				wm->wm[level].ignore_lines = wm->wm[level - 1].ignore_lines;
> +			}

Hmm. Reading the parent hsd this smells at least partially as
some kind of race in the Windows driver between async flip,
wm1+ disable, and the PSR wm level override behaviour.

We never do async flip + wm1+ disable from the same commit
which itself might be sufficient to avoid the issue. I
didn't think that even worked, but maybe it sort of does
if Windows attempts it. However since we don't do that we
might never hit this. Not sure.

The PSR wm level override stuff we don't handle at all
currently. I'm thinking that is something we should
remedy first.

Also while thinking about how to unify this and the
already existing wm1 w/a I realized that we don't 
check if the wm level is actually enabled or not.
So it's interfering with commit a301cb0fca2d ("drm/i915:
Keep plane watermarks enabled more aggressively").
My gut reaction is that we want a wm[level].enable
check there, but I've not fully thought through the
implications...

>  		}
>  	}
>  
> -- 
> 2.37.3

-- 
Ville Syrjälä
Intel