Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/psr: Implement Wa_14014971492

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Tue, Jan 24, 2023 at 12:26:35PM +0200, Jouni Högander wrote:
> Implement Wa_14014971492 and apply it for affected platforms.
> 
> Bspec: 52890, 54369, 55378, 66624
> 
> v2: Adjust platforms where applied

Thanks

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 7d4a15a283a0..7a72e15e6836 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1842,6 +1842,12 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  	if (full_update)
>  		goto skip_sel_fetch_set_loop;
>  
> +	/* Wa_14014971492 */
> +	if ((IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
> +	     IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv)) &&
> +	    crtc_state->splitter.enable)
> +		pipe_clip.y1 = 0;
> +
>  	ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
>  	if (ret)
>  		return ret;
> -- 
> 2.34.1
>