From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915/dg1: Drop final use of IS_DG1_GRAPHICS_STEP
Date: Mon, 30 Jan 2023 12:20:05 -0500 [thread overview]
Message-ID: <Y9f8RQJ3FAM7DSKV@intel.com> (raw)
In-Reply-To: <20230127224313.4042331-4-matthew.d.roper@intel.com>
On Fri, Jan 27, 2023 at 02:43:13PM -0800, Matt Roper wrote:
> All production DG1 hardware has graphics stepping B0; there is no such
> thing as C0. As such, we can simplify
>
> IS_DG1_GRAPHICS_STEP(uncore->i915, STEP_A0, STEP_C0)
>
> to just match DG1 in general.
>
> Bspec: 44463
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 3 ---
> 2 files changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> index f3ad93db0b21..89fdfc67f8d1 100644
> --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> @@ -158,7 +158,7 @@ static const struct intel_memory_region_ops intel_region_lmem_ops = {
> static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
> u64 *start, u32 *size)
> {
> - if (!IS_DG1_GRAPHICS_STEP(uncore->i915, STEP_A0, STEP_C0))
> + if (!IS_DG1(uncore->i915))
> return false;
>
> *start = 0;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 57b84dbca084..495788e18b77 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -656,9 +656,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define IS_RKL_DISPLAY_STEP(p, since, until) \
> (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until))
>
> -#define IS_DG1_GRAPHICS_STEP(p, since, until) \
> - (IS_DG1(p) && IS_GRAPHICS_STEP(p, since, until))
> -
> #define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
> (IS_ALDERLAKE_S(__i915) && \
> IS_DISPLAY_STEP(__i915, since, until))
> --
> 2.39.1
>
next prev parent reply other threads:[~2023-01-30 17:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-27 22:43 [Intel-gfx] [PATCH 0/3] Drop TGL/DG1 workarounds for pre-prod steppings Matt Roper
2023-01-27 22:43 ` [Intel-gfx] [PATCH 1/3] drm/i915/tgl: Drop support for pre-production steppings Matt Roper
2023-01-30 15:46 ` Rodrigo Vivi
2023-01-30 15:51 ` Matt Roper
2023-01-30 16:42 ` Rodrigo Vivi
2023-01-30 17:03 ` Matt Roper
2023-01-30 17:19 ` Rodrigo Vivi
2023-01-27 22:43 ` [Intel-gfx] [PATCH 2/3] drm/i915/dg1: " Matt Roper
2023-01-30 17:19 ` Rodrigo Vivi
2023-01-30 17:34 ` Matt Roper
2023-01-30 18:03 ` Rodrigo Vivi
2023-01-27 22:43 ` [Intel-gfx] [PATCH 3/3] drm/i915/dg1: Drop final use of IS_DG1_GRAPHICS_STEP Matt Roper
2023-01-30 17:20 ` Rodrigo Vivi [this message]
2023-01-27 23:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Drop TGL/DG1 workarounds for pre-prod steppings Patchwork
2023-01-28 6:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-01-30 18:18 ` Matt Roper
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