From: Daniel Vetter <daniel@ffwll.ch>
To: Matthew Brost <matthew.brost@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 0/3] Clean a few backend interfaces in the i915
Date: Wed, 26 May 2021 19:15:51 +0200 [thread overview]
Message-ID: <YK6CRz1PTwJDswWX@phenom.ffwll.local> (raw)
In-Reply-To: <20210525155341.GA6585@sdutt-i7>
On Tue, May 25, 2021 at 08:53:42AM -0700, Matthew Brost wrote:
> On Tue, May 25, 2021 at 03:56:56PM +0200, Daniel Vetter wrote:
> > On Fri, May 21, 2021 at 11:32:12AM -0700, Matthew Brost wrote:
> > > As discussed in [1] start merging some support patches as a precursor to
> > > GuC submission the i915. This is step #1 mentioned in [1].
> > >
> > > [1] https://patchwork.freedesktop.org/series/89844/
> > >
> > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> >
> > Pushed to drm-intel-gt-next, thanks for patches&reviews. Btw you can also
> > ping John H or Daniele for pushing stuff for you, should be quicker than
> > waiting for me to return from a lon w/e :-)
> >
>
> Thanks for the push. I don't think John H has push rights upstream, I
> know Daniele has rights but I don't think is up to date with the process
> to merge patches. I can discuss this with him today and see if he can
> get reenabled on this process.
John Harrison is 1 review short from qualifying for drm-intel.git commit
rights (if I got it right, maybe double-check), so please motivate him to
fix this asap so we have more committers.
-Daniel
>
> Matt
>
> > Plus I _really_ don't want to get back into the business of pushing other
> > people's work ...
> >
> > Cheers, Daniel
> >
> > >
> > > Chris Wilson (3):
> > > drm/i915/gt: Move engine setup out of set_default_submission
> > > drm/i915/gt: Move submission_method into intel_gt
> > > drm/i915/gt: Move CS interrupt handler to the backend
> > >
> > > drivers/gpu/drm/i915/gt/intel_engine.h | 8 +-
> > > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 19 +++-
> > > drivers/gpu/drm/i915/gt/intel_engine_types.h | 14 +--
> > > .../drm/i915/gt/intel_execlists_submission.c | 95 +++++++++++++------
> > > .../drm/i915/gt/intel_execlists_submission.h | 3 -
> > > drivers/gpu/drm/i915/gt/intel_gt_irq.c | 82 +++++-----------
> > > drivers/gpu/drm/i915/gt/intel_gt_irq.h | 23 +++++
> > > drivers/gpu/drm/i915/gt/intel_gt_types.h | 7 ++
> > > drivers/gpu/drm/i915/gt/intel_reset.c | 7 +-
> > > .../gpu/drm/i915/gt/intel_ring_submission.c | 12 ++-
> > > drivers/gpu/drm/i915/gt/intel_rps.c | 2 +-
> > > drivers/gpu/drm/i915/gt/selftest_execlists.c | 2 +-
> > > .../drm/i915/gt/selftest_ring_submission.c | 2 +-
> > > .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 64 ++++++-------
> > > .../gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 -
> > > drivers/gpu/drm/i915/i915_irq.c | 10 +-
> > > drivers/gpu/drm/i915/i915_perf.c | 10 +-
> > > 17 files changed, 199 insertions(+), 162 deletions(-)
> > >
> > > --
> > > 2.28.0
> > >
> >
> > --
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > http://blog.ffwll.ch
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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prev parent reply other threads:[~2021-05-26 17:15 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-21 18:32 [Intel-gfx] [PATCH 0/3] Clean a few backend interfaces in the i915 Matthew Brost
2021-05-21 18:32 ` [Intel-gfx] [PATCH 1/3] drm/i915/gt: Move engine setup out of set_default_submission Matthew Brost
2021-05-21 18:32 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Move submission_method into intel_gt Matthew Brost
2021-05-21 18:32 ` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Move CS interrupt handler to the backend Matthew Brost
2021-05-21 19:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Clean a few backend interfaces in the i915 Patchwork
2021-05-24 3:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-25 13:56 ` [Intel-gfx] [PATCH 0/3] " Daniel Vetter
2021-05-25 15:27 ` Tvrtko Ursulin
2021-05-25 15:54 ` Matthew Brost
2021-05-26 17:11 ` Daniel Vetter
2021-05-25 15:53 ` Matthew Brost
2021-05-26 17:15 ` Daniel Vetter [this message]
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