From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Anshuman Gupta <anshuman.gupta@intel.com>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
Juston Li <juston.li@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Uma Shankar <uma.shankar@intel.com>
Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Rename intel_load_plane_csc_black()
Date: Thu, 7 Oct 2021 10:14:05 +0300 [thread overview]
Message-ID: <YV6ePVRuzr3wljyl@intel.com> (raw)
In-Reply-To: <20211006235704.28894-5-ville.syrjala@linux.intel.com>
On Thu, Oct 07, 2021 at 02:57:04AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_load_plane_csc_black() is specific to glk+ so deserves
> a name reflecting that fact.
After testing on real hw it seems to be icl+ actually
(thank you bspec filter for letting me down).
I'll tweak the name when I apply this.
> Also rename the variables to
> standard form so I won't get confused reading the code.
>
> Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Juston Li <juston.li@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> .../drm/i915/display/skl_universal_plane.c | 35 +++++++++----------
> 1 file changed, 17 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 1e85ea98231f..709ab7166d88 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1011,29 +1011,28 @@ static u32 skl_surf_address(const struct intel_plane_state *plane_state,
> }
> }
>
> -static void intel_load_plane_csc_black(struct intel_plane *intel_plane)
> +static void glk_plane_csc_load_black(struct intel_plane *plane)
> {
> - struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
> - enum pipe pipe = intel_plane->pipe;
> - enum plane_id plane = intel_plane->id;
> - u16 postoff = 0;
> + struct drm_i915_private *i915 = to_i915(plane->base.dev);
> + enum plane_id plane_id = plane->id;
> + enum pipe pipe = plane->pipe;
>
> - intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 0), 0);
> - intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 1), 0);
> + intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 0), 0);
> + intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 1), 0);
>
> - intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 2), 0);
> - intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 3), 0);
> + intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 2), 0);
> + intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 3), 0);
>
> - intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 4), 0);
> - intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 5), 0);
> + intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 4), 0);
> + intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 5), 0);
>
> - intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 0), 0);
> - intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 1), 0);
> - intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 2), 0);
> + intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 0), 0);
> + intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 1), 0);
> + intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 2), 0);
>
> - intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 0), postoff);
> - intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 1), postoff);
> - intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 2), postoff);
> + intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 0), 0);
> + intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 1), 0);
> + intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 2), 0);
> }
>
> static void
> @@ -1102,7 +1101,7 @@ skl_program_plane(struct intel_plane *plane,
> * or after the commit, display content will be garbage.
> */
> if (plane_state->force_black)
> - intel_load_plane_csc_black(plane);
> + glk_plane_csc_load_black(plane);
>
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id), stride);
> intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> --
> 2.32.0
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2021-10-07 7:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 23:57 [Intel-gfx] [PATCH 0/4] drm/i915: Clean up the pxp stuff Ville Syrjala
2021-10-06 23:57 ` [Intel-gfx] [PATCH 1/4] drm/i915: Move the pxp plane state computation Ville Syrjala
2021-10-07 5:52 ` Li, Juston
2021-10-07 6:41 ` Ville Syrjälä
2021-10-06 23:57 ` [Intel-gfx] [PATCH 2/4] drm/i915: Fix up skl_program_plane() pxp stuff Ville Syrjala
2021-10-07 18:36 ` Rodrigo Vivi
2021-10-06 23:57 ` [Intel-gfx] [PATCH 3/4] drm/i915: Remove the drm_dbg() from the vblank evade critical section Ville Syrjala
2021-10-07 5:54 ` Li, Juston
2021-10-06 23:57 ` [Intel-gfx] [PATCH 4/4] drm/i915: Rename intel_load_plane_csc_black() Ville Syrjala
2021-10-07 5:55 ` Li, Juston
2021-10-07 7:14 ` Ville Syrjälä [this message]
2021-10-07 1:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Clean up the pxp stuff Patchwork
2021-10-07 3:53 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-07 5:59 ` [Intel-gfx] [PATCH 0/4] " Li, Juston
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