Re: [Intel-gfx] [PATCH v2 04/10] drm/i915/display: remove intel_wait_for_vblank()

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Dec 01, 2021 at 03:57:06PM +0200, Jani Nikula wrote:
> There are only three call sites remaining for
> intel_wait_for_vblank(). Remove the function, and open code it to avoid
> new users from showing up.
> 
> v2:
> - Use intel_crtc_wait_for_next_vblank() (Ville)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c         | 2 +-
>  drivers/gpu/drm/i915/display/intel_crt.c           | 2 +-
>  drivers/gpu/drm/i915/display/intel_display.c       | 8 ++++++--
>  drivers/gpu/drm/i915/display/intel_display_types.h | 8 --------
>  4 files changed, 8 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 5a475aa52079..986fb9ba750e 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1690,7 +1690,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
>  	intel_de_write(dev_priv, CDCLK_CTL, val);
>  
>  	if (pipe != INVALID_PIPE)
> -		intel_wait_for_vblank(dev_priv, pipe);
> +		intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
>  
>  	if (DISPLAY_VER(dev_priv) >= 11) {
>  		ret = sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 42533e6457b5..6a3893c8ff22 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -721,7 +721,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>  		intel_uncore_posting_read(uncore, pipeconf_reg);
>  		/* Wait for next Vblank to substitue
>  		 * border color for Color info */
> -		intel_wait_for_vblank(dev_priv, pipe);
> +		intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
>  		st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
>  		status = ((st00 & (1 << 4)) != 0) ?
>  			connector_status_connected :
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 624a7d719531..09f088e6272b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2101,8 +2101,12 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>  	 * to change the workaround. */
>  	hsw_workaround_pipe = new_crtc_state->hsw_workaround_pipe;
>  	if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) {
> -		intel_wait_for_vblank(dev_priv, hsw_workaround_pipe);
> -		intel_wait_for_vblank(dev_priv, hsw_workaround_pipe);
> +		struct intel_crtc *wa_crtc;
> +
> +		wa_crtc = intel_crtc_for_pipe(dev_priv, hsw_workaround_pipe);
> +
> +		intel_crtc_wait_for_next_vblank(wa_crtc);
> +		intel_crtc_wait_for_next_vblank(wa_crtc);
>  	}
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 036f9be3045d..a48dfd1474dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -2025,14 +2025,6 @@ intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc)
>  	drm_crtc_wait_one_vblank(&crtc->base);
>  }
>  
> -static inline void
> -intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
> -{
> -	struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
> -
> -	intel_crtc_wait_for_next_vblank(crtc);
> -}
> -
>  static inline void
>  intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
>  {
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel