From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 5/8] drm/i915/dp: rewrite DP 2.0 128b/132b link training based on errata
Date: Tue, 8 Feb 2022 14:55:53 +0200 [thread overview]
Message-ID: <YgJoWUYRVjJDQFq4@intel.com> (raw)
In-Reply-To: <87fsotr1zi.fsf@intel.com>
On Tue, Feb 08, 2022 at 02:12:33PM +0200, Jani Nikula wrote:
> On Tue, 08 Feb 2022, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Tue, Feb 08, 2022 at 11:17:22AM +0200, Jani Nikula wrote:
> >> On Fri, 04 Feb 2022, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> >> > On Thu, Feb 03, 2022 at 11:03:54AM +0200, Jani Nikula wrote:
> >> >> +
> >> >> + if (timeout) {
> >> >> + intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);
> >> >> + drm_err(&i915->drm,
> >> >> + "[ENCODER:%d:%s] Lane channel eq timeout\n",
> >> >> + encoder->base.base.id, encoder->base.name);
> >> >> + return false;
> >> >> + }
> >> >> +
> >> >> + if (time_after(jiffies, deadline))
> >> >> + timeout = true; /* try one last time after deadline */
> >> >
> >> > Is there a reason we can't do this just before drm_dp_dpcd_read_link_status()
> >> > so we don't have to pass the timeout status from one loop iteration to
> >> > the next?
> >>
> >> The point is to check one last time after timeout has passed, like you
> >> suggested in previous review, and I agreed.
> >
> > Sure but why can't it be something more like?
> >
> > timeout = time_after();
> > read_status();
> > if (bad)
> > bail;
> > if (timeout)
> > bail;
> >
> > I think we have it more like that in wait_for()/etc.
>
> I was going to fix this, but then realized the "one more time" really
> only makes sense if it includes updating the signal levels and training
> set and then checking the status. I don't think there's point in "one
> more time" only covering the status read.
Hmm. Yeah, I suppose that is true. We can't really know when the sink
updated the status so checking for the timeout just before that might
have the same issue as checking entirely after the status check.
>
> I've got the loop set up such that the flow is natural when entering the
> loop i.e. I'd rather not have the adjust in the beginning with some if
> (try != 0) check.
>
> Or am I missing something?
Nah. I guess it's best leave it the way you have it now.
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2022-02-08 12:55 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-03 9:03 [Intel-gfx] [PATCH v2 0/8] drm/dp, drm/i915: 128b/132b updates Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 1/8] drm/dp: add drm_dp_128b132b_read_aux_rd_interval() Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 2/8] drm/dp: add 128b/132b link status helpers from DP 2.0 E11 Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 3/8] drm/dp: add some new DPCD macros " Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 4/8] drm/i915/dp: move intel_dp_prepare_link_train() call Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 5/8] drm/i915/dp: rewrite DP 2.0 128b/132b link training based on errata Jani Nikula
2022-02-04 11:37 ` Ville Syrjälä
2022-02-08 9:17 ` Jani Nikula
2022-02-08 9:39 ` Ville Syrjälä
2022-02-08 12:12 ` Jani Nikula
2022-02-08 12:55 ` Ville Syrjälä [this message]
2022-02-08 13:31 ` Jani Nikula
2022-02-08 13:30 ` [Intel-gfx] [PATCH v3] " Jani Nikula
2022-02-08 14:32 ` [Intel-gfx] [PATCH v4] " Jani Nikula
2022-02-08 14:38 ` Ville Syrjälä
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/dp: add 128b/132b support to link status checks Jani Nikula
2022-02-08 15:06 ` Ville Syrjälä
2022-02-09 9:09 ` Jani Nikula
2022-02-09 9:17 ` Ville Syrjälä
2022-02-11 10:11 ` Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/mst: update slot information for 128b/132b Jani Nikula
2022-02-08 15:02 ` Ville Syrjälä
2022-02-08 15:23 ` [Intel-gfx] [PATCH v3] " Jani Nikula
2022-02-03 9:03 ` [Intel-gfx] [PATCH v2 8/8] HACK: drm/i915/dp: give more time for CDS Jani Nikula
2022-02-03 13:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, drm/i915: 128b/132b updates (rev2) Patchwork
2022-02-03 13:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-03 14:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-03 17:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-08 14:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, drm/i915: 128b/132b updates (rev4) Patchwork
2022-02-08 14:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-08 15:15 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-08 16:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, drm/i915: 128b/132b updates (rev5) Patchwork
2022-02-08 17:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-08 17:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-08 19:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, drm/i915: 128b/132b updates (rev6) Patchwork
2022-02-08 19:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-08 20:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-08 21:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-09 9:26 ` [Intel-gfx] [PATCH v2 0/8] drm/dp, drm/i915: 128b/132b updates Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YgJoWUYRVjJDQFq4@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox