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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Murthy, Arun R" <arun.r.murthy@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Nuke PCH_JSP
Date: Thu, 30 Jun 2022 19:59:20 +0300	[thread overview]
Message-ID: <Yr3WaIHJM4/PWgJr@intel.com> (raw)
In-Reply-To: <DM6PR11MB31778640DFA620D2E283AE5BBABA9@DM6PR11MB3177.namprd11.prod.outlook.com>

On Thu, Jun 30, 2022 at 03:55:57PM +0000, Murthy, Arun R wrote:
> 
> 
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> > Syrjala
> > Sent: Thursday, June 30, 2022 8:36 PM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Nuke PCH_JSP
> > 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > JSP is based on ICP and we don't really need to differentiate between the
> > two. So let's just delcare JSP to be ICP.
> > 
> > The only slight change here is for Wa_14011294188 which we used to apply
> > for JSP but now we'll only apply to MCC. This should be fine since the issue
> > being dealt with was introduced in TGP and inherited into MCC. JSP being
> > derived from ICP should not need this workaround.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
> >  drivers/gpu/drm/i915/intel_pch.c                   | 3 ++-
> >  drivers/gpu/drm/i915/intel_pch.h                   | 4 +---
> >  3 files changed, 4 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> > b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index a9cb27f1c964..589af257edeb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -1608,7 +1608,7 @@ static void icl_display_core_init(struct
> > drm_i915_private *dev_priv,
> >  	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> > 
> >  	/* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */
> > -	if (INTEL_PCH_TYPE(dev_priv) >= PCH_JSP &&
> > +	if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP &&
> >  	    INTEL_PCH_TYPE(dev_priv) < PCH_DG1)
> >  		intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0,
> >  			     PCH_DPMGUNIT_CLOCK_GATE_DISABLE); diff --git
> > a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
> > index b45c504c6f03..0fec25be146a 100644
> > --- a/drivers/gpu/drm/i915/intel_pch.c
> > +++ b/drivers/gpu/drm/i915/intel_pch.c
> > @@ -128,7 +128,8 @@ intel_pch_type(const struct drm_i915_private
> > *dev_priv, unsigned short id)
> >  	case INTEL_PCH_JSP_DEVICE_ID_TYPE:
> >  		drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");
> >  		drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv));
> > -		return PCH_JSP;
> > +		/* JSP is ICP compatible */
> > +		return PCH_ICP;
> >  	case INTEL_PCH_ADP_DEVICE_ID_TYPE:
> >  	case INTEL_PCH_ADP2_DEVICE_ID_TYPE:
> >  	case INTEL_PCH_ADP3_DEVICE_ID_TYPE:
> > diff --git a/drivers/gpu/drm/i915/intel_pch.h
> > b/drivers/gpu/drm/i915/intel_pch.h
> > index 07f6f5517968..7c8ce9781d1a 100644
> > --- a/drivers/gpu/drm/i915/intel_pch.h
> > +++ b/drivers/gpu/drm/i915/intel_pch.h
> > @@ -22,8 +22,7 @@ enum intel_pch {
> >  	PCH_LPT,	/* Lynxpoint/Wildcatpoint PCH */
> >  	PCH_SPT,        /* Sunrisepoint/Kaby Lake PCH */
> >  	PCH_CNP,        /* Cannon/Comet Lake PCH */
> > -	PCH_ICP,	/* Ice Lake PCH */
> > -	PCH_JSP,	/* Jasper Lake PCH */
> > +	PCH_ICP,	/* Ice Lake/Jasper Lake PCH */
> 
> Only in i915_irq icp is used and in the rest of the i915 code icl is used leading to confusion.
> I would rather suggest to use ICL since most of the driver references it as icl and also change icp in i915_irq to icl.
> This is just my opinion, other can comment over here.

ICL is a CPU, ICP is a PCH.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-06-30 16:59 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-30 15:05 [Intel-gfx] [PATCH 0/3] drm/i915: PCH type cleanup Ville Syrjala
2022-06-30 15:05 ` [Intel-gfx] [PATCH 1/3] drm/i915: Use short PCH names consistently Ville Syrjala
2022-06-30 15:50   ` Murthy, Arun R
2022-06-30 17:00     ` Ville Syrjälä
2022-07-01  9:53       ` Jani Nikula
2022-06-30 15:05 ` [Intel-gfx] [PATCH 2/3] drm/i915: Nuke PCH_MCC Ville Syrjala
2022-07-01  9:55   ` Jani Nikula
2022-07-01 12:21     ` Ville Syrjälä
2022-07-01 13:51       ` Jani Nikula
2022-06-30 15:06 ` [Intel-gfx] [PATCH 3/3] drm/i915: Nuke PCH_JSP Ville Syrjala
2022-06-30 15:55   ` Murthy, Arun R
2022-06-30 16:59     ` Ville Syrjälä [this message]
2022-07-01  9:57   ` Jani Nikula
2022-06-30 17:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: PCH type cleanup Patchwork
2022-06-30 18:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-07-01  9:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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