From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/6] drm/i915/pm: drop intel_suspend_hw()
Date: Thu, 2 Mar 2023 13:36:38 -0500 [thread overview]
Message-ID: <ZADsth+4MZBIJdcs@intel.com> (raw)
In-Reply-To: <f732a7922c2450b41169c9b79a80fba97ab00592.1677678803.git.jani.nikula@intel.com>
On Wed, Mar 01, 2023 at 03:54:17PM +0200, Jani Nikula wrote:
> All intel_suspend_hw() does is clear PCH_LP_PARTITION_LEVEL_DISABLE bit
> in SOUTH_DSPCLK_GATE_D for LPT LP. intel_suspend_hw() gets called from
> i915_drm_suspend().
>
> However, i915_drm_suspend_late() calls
> intel_display_power_suspend_late(), which in turn calls hsw_enable_pc8()
> on HSW and BDW. The first thing that does is clear
> PCH_LP_PARTITION_LEVEL_DISABLE bit in SOUTH_DSPCLK_GATE_D.
For a moment I thought that the if HSW || BDW on the other call would
make some difference, but then I confirmed on intel_pch.c that only
HSW and BDW has PCH_LPT anyway. So,
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Remove the duplicated clearing of the bit, effectively delaying it from
> i915_drm_suspend() to i915_drm_suspend_late(), and remove the
> unnecessary intel_suspend_hw() function altogether.
>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_driver.c | 2 --
> drivers/gpu/drm/i915/intel_pm.c | 16 ----------------
> drivers/gpu/drm/i915/intel_pm.h | 1 -
> 3 files changed, 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 171ff4edabd6..a53fd339e2cc 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1079,8 +1079,6 @@ static int i915_drm_suspend(struct drm_device *dev)
>
> intel_suspend_encoders(dev_priv);
>
> - intel_suspend_hw(dev_priv);
> -
> /* Must be called before GGTT is suspended. */
> intel_dpt_suspend(dev_priv);
> i915_ggtt_suspend(to_gt(dev_priv)->ggtt);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8b02af531e82..c45af0d981fd 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -320,16 +320,6 @@ static void lpt_init_clock_gating(struct drm_i915_private *dev_priv)
> 0, TRANS_CHICKEN1_DP0UNIT_GC_DISABLE);
> }
>
> -static void lpt_suspend_hw(struct drm_i915_private *dev_priv)
> -{
> - if (HAS_PCH_LPT_LP(dev_priv)) {
> - u32 val = intel_uncore_read(&dev_priv->uncore, SOUTH_DSPCLK_GATE_D);
> -
> - val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
> - intel_uncore_write(&dev_priv->uncore, SOUTH_DSPCLK_GATE_D, val);
> - }
> -}
> -
> static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv,
> int general_prio_credits,
> int high_prio_credits)
> @@ -789,12 +779,6 @@ void intel_init_clock_gating(struct drm_i915_private *dev_priv)
> dev_priv->clock_gating_funcs->init_clock_gating(dev_priv);
> }
>
> -void intel_suspend_hw(struct drm_i915_private *dev_priv)
> -{
> - if (HAS_PCH_LPT(dev_priv))
> - lpt_suspend_hw(dev_priv);
> -}
> -
> static void nop_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> drm_dbg_kms(&dev_priv->drm,
> diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h
> index 1dd464d2d186..f774bddcdca6 100644
> --- a/drivers/gpu/drm/i915/intel_pm.h
> +++ b/drivers/gpu/drm/i915/intel_pm.h
> @@ -13,7 +13,6 @@ struct intel_crtc_state;
> struct intel_plane_state;
>
> void intel_init_clock_gating(struct drm_i915_private *dev_priv);
> -void intel_suspend_hw(struct drm_i915_private *dev_priv);
> void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv);
>
> #endif /* __INTEL_PM_H__ */
> --
> 2.39.1
>
next prev parent reply other threads:[~2023-03-02 18:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-01 13:54 [Intel-gfx] [PATCH 0/6] drm/i915: pm cleanups, rename to clock gating Jani Nikula
2023-03-01 13:54 ` [Intel-gfx] [PATCH 1/6] drm/i915/wm: remove display/ prefix from include Jani Nikula
2023-03-02 18:10 ` Rodrigo Vivi
2023-03-01 13:54 ` [Intel-gfx] [PATCH 2/6] drm/i915/pm: drop intel_pm_setup() Jani Nikula
2023-03-02 18:11 ` Rodrigo Vivi
2023-03-01 13:54 ` [Intel-gfx] [PATCH 3/6] drm/i915/pm: drop intel_suspend_hw() Jani Nikula
2023-03-02 18:36 ` Rodrigo Vivi [this message]
2023-03-01 13:54 ` [Intel-gfx] [PATCH 4/6] drm/i915: remove unnecessary intel_pm.h includes Jani Nikula
2023-03-02 18:37 ` Rodrigo Vivi
2023-03-06 17:47 ` Jani Nikula
2023-03-01 13:54 ` [Intel-gfx] [PATCH 5/6] drm/i915: rename intel_pm.[ch] to intel_clock_gating.[ch] Jani Nikula
2023-03-02 18:39 ` Rodrigo Vivi
2023-03-01 13:54 ` [Intel-gfx] [PATCH 6/6] drm/i915/clock: mass rename dev_priv to i915 Jani Nikula
2023-03-02 18:40 ` Rodrigo Vivi
2023-03-01 20:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: pm cleanups, rename to clock gating Patchwork
2023-03-01 21:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-04 9:43 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZADsth+4MZBIJdcs@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox