Re: [Intel-gfx] [PATCH] drm/i915: Add i915.enable_sagv modparam

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Mar 22, 2023 at 04:36:09PM -0400, Rodrigo Vivi wrote:
> On Wed, Mar 22, 2023 at 08:12:19PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Currently we have no sane way to forcibly disable SAGV, which
> > makes debugging things a PITA. Manually poking at the pcode
> > mailbox with it's various SAGV/QGV/PSF formats is no fun,
> > and likely to be clobbered by the driver anyway.
> > 
> > Let's add a modparam for this.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++++
> >  drivers/gpu/drm/i915/i915_params.c           | 3 +++
> >  drivers/gpu/drm/i915/i915_params.h           | 1 +
> >  3 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index 50a9a6adbe32..ff70225c0263 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -411,6 +411,9 @@ static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state
> >  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >  	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> >  
> > +	if (!i915->params.enable_sagv)
> > +		return false;
> 
> would this be one more ifdef for xe?

Why? xe needs it just as much.

> should we hide this on a HAS_SAGV?

If we have no sagv then we're not going to enable sagv anyway.
Doesn't matter if it's blocked a few lines earlier by the
modparam rather than falling through to checking the other
stuff.

> 
> anyway, let's move on:
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Thanks

> 
> 
> > +
> >  	if (DISPLAY_VER(i915) >= 12)
> >  		return tgl_crtc_can_enable_sagv(crtc_state);
> >  	else
> > @@ -3696,6 +3699,7 @@ static int intel_sagv_status_show(struct seq_file *m, void *unused)
> >  	};
> >  
> >  	seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(i915)));
> > +	seq_printf(m, "SAGV modparam: %s\n", str_enabled_disabled(i915->params.enable_sagv));
> >  	seq_printf(m, "SAGV status: %s\n", sagv_status[i915->display.sagv.status]);
> >  	seq_printf(m, "SAGV block time: %d usec\n", i915->display.sagv.block_time_us);
> >  
> > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> > index ade744cccfea..66141906ea05 100644
> > --- a/drivers/gpu/drm/i915/i915_params.c
> > +++ b/drivers/gpu/drm/i915/i915_params.c
> > @@ -121,6 +121,9 @@ i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> >  	"(0=disabled, 1=enabled) "
> >  	"Default: 0");
> >  
> > +i915_param_named_unsafe(enable_sagv, bool, 0600,
> > +	"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
> > +
> >  i915_param_named_unsafe(force_probe, charp, 0400,
> >  	"Force probe options for specified supported devices. "
> >  	"See CONFIG_DRM_I915_FORCE_PROBE for details.");
> > diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> > index 3f51f90145b6..6798b5c2363d 100644
> > --- a/drivers/gpu/drm/i915/i915_params.h
> > +++ b/drivers/gpu/drm/i915/i915_params.h
> > @@ -56,6 +56,7 @@ struct drm_printer;
> >  	param(int, enable_psr, -1, 0600) \
> >  	param(bool, psr_safest_params, false, 0400) \
> >  	param(bool, enable_psr2_sel_fetch, true, 0400) \
> > +	param(bool, enable_sagv, true, 0600) \
> >  	param(int, disable_power_well, -1, 0400) \
> >  	param(int, enable_ips, 1, 0600) \
> >  	param(int, invert_brightness, 0, 0600) \
> > -- 
> > 2.39.2
> > 

-- 
Ville Syrjälä
Intel