From: Imre Deak <imre.deak@intel.com>
To: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 6/9] drm/i915/mtl/display: Implement DisplayPort sequences
Date: Thu, 13 Apr 2023 19:17:56 +0300 [thread overview]
Message-ID: <ZDgrNBvgpN9WOTH0@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <20230412224925.1309815-7-radhakrishna.sripada@intel.com>
On Wed, Apr 12, 2023 at 03:49:22PM -0700, Radhakrishna Sripada wrote:
> [...]
> +static void mtl_disable_ddi_buf(struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + enum port port = encoder->port;
> + u32 val;
> +
> + /* 3.b Clear DDI_CTL_DE Enable to 0. */
> + val = intel_de_read(dev_priv, DDI_BUF_CTL(port));
> + if (val & DDI_BUF_CTL_ENABLE) {
> + val &= ~DDI_BUF_CTL_ENABLE;
> + intel_de_write(dev_priv, DDI_BUF_CTL(port), val);
> +
> + /* 3.c Poll for PORT_BUF_CTL Idle Status == 1, timeout after 100us */
> + mtl_wait_ddi_buf_idle(dev_priv, port);
> + }
> +
> + /* 3.d Disable D2D Link */
> + mtl_ddi_disable_d2d_link(encoder);
> +
> + /* 3.e Disable DP_TP_CTL */
> + if (intel_crtc_has_dp_encoder(crtc_state)) {
> + val = intel_de_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state));
> + val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);
Only DP_TP_CTL_ENABLE should be cleared and could use intel_de_rmw().
> + intel_de_write(dev_priv, dp_tp_ctl_reg(encoder, crtc_state), val);
> + }
> +}
next prev parent reply other threads:[~2023-04-13 16:19 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-12 22:49 [Intel-gfx] [PATCH 0/9] drm/i915/mtl: Add Support for C10 phy Radhakrishna Sripada
2023-04-12 22:49 ` [Intel-gfx] [PATCH 1/9] drm/i915/mtl: Add DP rates Radhakrishna Sripada
2023-04-12 22:49 ` [Intel-gfx] [PATCH 2/9] drm/i915/mtl: Create separate reg file for PICA registers Radhakrishna Sripada
2023-04-12 22:49 ` [Intel-gfx] [PATCH 3/9] drm/i915/mtl: Add Support for C10 PHY message bus and pll programming Radhakrishna Sripada
2023-04-13 16:50 ` Imre Deak
2023-04-12 22:49 ` [Intel-gfx] [PATCH 4/9] drm/i915/mtl: Add vswing programming for C10 phys Radhakrishna Sripada
2023-04-13 15:57 ` Imre Deak
2023-04-12 22:49 ` [Intel-gfx] [PATCH 5/9] drm/i915/mtl: MTL PICA hotplug detection Radhakrishna Sripada
2023-04-12 22:49 ` [Intel-gfx] [PATCH 6/9] drm/i915/mtl/display: Implement DisplayPort sequences Radhakrishna Sripada
2023-04-13 16:17 ` Imre Deak [this message]
2023-04-12 22:49 ` [Intel-gfx] [PATCH 7/9] drm/i915/mtl: Initial DDI port setup Radhakrishna Sripada
2023-04-13 16:19 ` Imre Deak
2023-04-12 22:49 ` [Intel-gfx] [PATCH 8/9] drm/i915/mtl: Add C10 phy programming for HDMI Radhakrishna Sripada
2023-04-13 16:36 ` Imre Deak
2023-04-13 20:31 ` Sripada, Radhakrishna
2023-04-12 22:49 ` [Intel-gfx] [PATCH 9/9] drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL " Radhakrishna Sripada
2023-04-13 16:51 ` Imre Deak
2023-04-12 23:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Add Support for C10 phy (rev2) Patchwork
2023-04-12 23:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-12 23:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-04-13 21:01 [Intel-gfx] [PATCH 0/9] drm/i915/mtl: Add Support for C10 phy Radhakrishna Sripada
2023-04-13 21:01 ` [Intel-gfx] [PATCH 6/9] drm/i915/mtl/display: Implement DisplayPort sequences Radhakrishna Sripada
2023-04-13 21:24 [Intel-gfx] [PATCH 0/9] drm/i915/mtl: Add Support for C10 phy Radhakrishna Sripada
2023-04-13 21:24 ` [Intel-gfx] [PATCH 6/9] drm/i915/mtl/display: Implement DisplayPort sequences Radhakrishna Sripada
2023-04-14 11:37 ` Imre Deak
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