Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 6/8] drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuff
Date: Wed, 17 Apr 2024 16:04:10 +0300	[thread overview]
Message-ID: <Zh_IypIyCZcgXvWS@intel.com> (raw)
In-Reply-To: <87h6g23ilu.fsf@intel.com>

On Mon, Apr 15, 2024 at 03:39:41PM +0300, Jani Nikula wrote:
> On Fri, 12 Apr 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Since all of this lives in intel_dpio_phy.c let's rename the
> > bxt/glk functions to have bxt_dpio_phy_ namespace.
> 
> Seems like intel_dpio_phy.c could be split to vlv_dpio_phy.c and
> bxt_dpio_phy.c after this. At a glance, there isn't really anything
> shared between VLV/CHV and BXT/GLK code paths. They've just been thrown
> in to the same file.

Yeah, the original idea was that we could perhaps combine the 
CHV and BXT/GLK code into one since it's the same IP block on
both, but we ended up doing things a bit differently between
the two anyway so probably no one will ever do this.

VLV vs. CHV could also be split since the PHY codepaths
are compleletely separate, but perhaps not really worth
it since a lot of the other code is shared between the
two platforms anyway.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2024-04-17 13:04 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-12 17:58 [PATCH 0/8] drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup Ville Syrjala
2024-04-12 17:58 ` [PATCH 1/8] drm/i915/dpio: Clean up bxt/glk PHY registers Ville Syrjala
2024-04-12 17:58 ` [PATCH 2/8] drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glk Ville Syrjala
2024-04-15 12:35   ` Jani Nikula
2024-04-15 23:12   ` kernel test robot
2024-04-16  0:28   ` kernel test robot
2024-04-17 15:12   ` [PATCH v2 " Ville Syrjala
2024-04-12 17:58 ` [PATCH 3/8] drm/i915/dpio: Extract bxt_dpio_phy_regs.h Ville Syrjala
2024-04-16  1:41   ` kernel test robot
2024-04-17 15:12   ` [PATCH v2 " Ville Syrjala
2024-04-12 17:58 ` [PATCH 4/8] drm/i915/dpio: Introdude bxt_ddi_phy_rmw_grp() Ville Syrjala
2024-04-15 12:36   ` Jani Nikula
2024-04-12 17:58 ` [PATCH 5/8] drm/i915/dpio: Use intel_de_rmw() for BXT DPIO latency optim setup Ville Syrjala
2024-04-12 17:58 ` [PATCH 6/8] drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuff Ville Syrjala
2024-04-15 12:39   ` Jani Nikula
2024-04-17 13:04     ` Ville Syrjälä [this message]
2024-04-12 17:58 ` [PATCH 7/8] drm/i915/dpio: Program bxt/glk PHY TX registers per-lane Ville Syrjala
2024-04-12 17:58 ` [PATCH 8/8] drm/i915: Enable per-lane DP drive settings for bxt/glk Ville Syrjala
2024-04-15 12:34 ` [PATCH 0/8] drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup Jani Nikula
2024-04-15 14:29 ` ✗ Fi.CI.BUILD: failure for " Patchwork
2024-04-17 18:07 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup (rev3) Patchwork
2024-04-17 18:07 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-17 18:22 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-18 16:40   ` Jani Nikula
2024-04-19  5:37     ` Musial, Ewelina
2024-04-19  8:31       ` Jani Nikula
2024-04-19 16:56         ` Ville Syrjälä
2024-04-18 23:34 ` ✓ Fi.CI.IGT: " Patchwork
2024-04-19 17:54 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup (rev4) Patchwork
2024-04-19 17:54 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-19 18:00 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-20  1:40 ` ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Zh_IypIyCZcgXvWS@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox