From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: add i9xx_display_irq_reset()
Date: Mon, 16 Sep 2024 12:26:12 -0400 [thread overview]
Message-ID: <ZuhcJPu8U5z-dlnl@intel.com> (raw)
In-Reply-To: <20240916134720.501725-1-jani.nikula@intel.com>
On Mon, Sep 16, 2024 at 04:47:20PM +0300, Jani Nikula wrote:
> Add common i9xx_display_irq_reset() for display 2-4. The check for
> I915_HAS_HOTPLUG() covers all the alternatives.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 13 ++++++++++++-
> drivers/gpu/drm/i915/display/intel_display_irq.h | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 15 +++------------
> 3 files changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 8f13f148c73e..b830756124c3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -405,7 +405,7 @@ static void i9xx_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
> res1, res2);
> }
>
> -void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
> +static void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
> {
> enum pipe pipe;
>
> @@ -1466,6 +1466,17 @@ void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> dev_priv->irq_mask = ~0u;
> }
>
> +void i9xx_display_irq_reset(struct drm_i915_private *i915)
> +{
> + if (I915_HAS_HOTPLUG(i915)) {
> + i915_hotplug_interrupt_update(i915, 0xffffffff, 0);
> + intel_uncore_rmw(&i915->uncore,
> + PORT_HOTPLUG_STAT(i915), 0, 0);
> + }
> +
> + i9xx_pipestat_irq_reset(i915);
> +}
> +
> void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index 2a090dd6abd7..093e356a2894 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -54,6 +54,7 @@ void gen11_display_irq_handler(struct drm_i915_private *i915);
> u32 gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32 master_ctl);
> void gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir);
>
> +void i9xx_display_irq_reset(struct drm_i915_private *i915);
> void vlv_display_irq_reset(struct drm_i915_private *i915);
> void gen8_display_irq_reset(struct drm_i915_private *i915);
> void gen11_display_irq_reset(struct drm_i915_private *i915);
> @@ -68,7 +69,6 @@ u32 i915_pipestat_enable_mask(struct drm_i915_private *i915, enum pipe pipe);
> void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
> void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
> void i915_enable_asle_pipestat(struct drm_i915_private *i915);
> -void i9xx_pipestat_irq_reset(struct drm_i915_private *i915);
>
> void i9xx_pipestat_irq_ack(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2321de48d169..231592125934 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -849,7 +849,7 @@ static void i8xx_irq_reset(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
>
> - i9xx_pipestat_irq_reset(dev_priv);
> + i9xx_display_irq_reset(dev_priv);
>
> gen2_irq_reset(uncore);
> dev_priv->irq_mask = ~0u;
> @@ -1037,13 +1037,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
>
> - if (I915_HAS_HOTPLUG(dev_priv)) {
> - i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
> - intel_uncore_rmw(&dev_priv->uncore,
> - PORT_HOTPLUG_STAT(dev_priv), 0, 0);
> - }
> -
> - i9xx_pipestat_irq_reset(dev_priv);
> + i9xx_display_irq_reset(dev_priv);
>
> GEN3_IRQ_RESET(uncore, GEN2_);
> dev_priv->irq_mask = ~0u;
> @@ -1148,10 +1142,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
>
> - i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
> - intel_uncore_rmw(uncore, PORT_HOTPLUG_STAT(dev_priv), 0, 0);
> -
> - i9xx_pipestat_irq_reset(dev_priv);
> + i9xx_display_irq_reset(dev_priv);
>
> GEN3_IRQ_RESET(uncore, GEN2_);
> dev_priv->irq_mask = ~0u;
> --
> 2.39.2
>
next prev parent reply other threads:[~2024-09-16 16:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 13:47 [PATCH] drm/i915: add i9xx_display_irq_reset() Jani Nikula
2024-09-16 16:26 ` Rodrigo Vivi [this message]
2024-09-19 12:57 ` Jani Nikula
2024-09-16 19:02 ` ✓ Fi.CI.BAT: success for " Patchwork
2024-09-17 7:27 ` ✗ Fi.CI.IGT: failure " Patchwork
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