From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Deak, Imre" <imre.deak@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells
Date: Mon, 20 Jul 2020 23:34:04 +0000 [thread overview]
Message-ID: <a0ed16b4c4b6f09627d9f1549c49c4eea93c46b1.camel@intel.com> (raw)
In-Reply-To: <20200720232952.16228-1-imre.deak@intel.com>
On Tue, 2020-07-21 at 02:29 +0300, Imre Deak wrote:
> The dependency between power wells is determined by the ordering of the
> power well list: when enabling the power wells for a domain, this
> happens walking the power well list forward, while disabling them
> happens in the reverse direction. Accordingly a power well on the list
> must follow any other power well it depends on.
>
> Since the TC AUX power wells depend on TC-cold being blocked, move the
> TC-cold off power well before all AUX power wells.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Fixes: 3c02934b24e ("Implement TC cold sequences")
> Cc: José Roberto de Souza <
> jose.souza@intel.com
> >
> Signed-off-by: Imre Deak <
> imre.deak@intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 0c713e83274d..c2aaf6911e7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -4146,6 +4146,12 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
> .hsw.idx = TGL_PW_CTL_IDX_DDI_TC6,
> },
> },
> + {
> + .name = "TC cold off",
> + .domains = TGL_TC_COLD_OFF_POWER_DOMAINS,
> + .ops = &tgl_tc_cold_off_ops,
> + .id = DISP_PW_ID_NONE,
> + },
> {
> .name = "AUX A",
> .domains = TGL_AUX_A_IO_POWER_DOMAINS,
> @@ -4332,12 +4338,6 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
> .hsw.irq_pipe_mask = BIT(PIPE_D),
> },
> },
> - {
> - .name = "TC cold off",
> - .domains = TGL_TC_COLD_OFF_POWER_DOMAINS,
> - .ops = &tgl_tc_cold_off_ops,
> - .id = DISP_PW_ID_NONE,
> - },
> };
>
> static const struct i915_power_well_desc rkl_power_wells[] = {
>
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next prev parent reply other threads:[~2020-07-20 23:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-20 23:29 [Intel-gfx] [PATCH] drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells Imre Deak
2020-07-20 23:34 ` Souza, Jose [this message]
2020-07-20 23:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2020-07-21 0:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-21 1:16 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-08-06 18:20 ` Imre Deak
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