From: Wayne Boyer <wayne.boyer@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>,
<intel-gfx@lists.freedesktop.org>, Caz Yokoyama <caz@caztech.com>,
"Aravind Iddamsetty" <aravind.iddamsetty@intel.com>
Cc: tejas.upadhyay@intel.com, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Add missing mask when reading GEN12_DSMBASE
Date: Tue, 20 Sep 2022 12:16:26 -0700 [thread overview]
Message-ID: <a34072db-04aa-9117-1a03-6b5e60243986@intel.com> (raw)
In-Reply-To: <20220915-stolen-v2-1-20ff797de047@intel.com>
On 9/16/22 10:36 AM, Lucas De Marchi wrote:
> DSMBASE register is defined so BDSM bitfield contains the bits 63 to 20
> of the base address of stolen. For the supported platforms bits 0-19 are
> zero but that may not be true in future. Add the missing mask.
>
> v2: Use REG_GENMASK64()
>
> Acked-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
> Reviewed-by: Caz Yokoyama <caz@caztech.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
Reviewed-by: Wayne Boyer <wayne.boyer@intel.com>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index acc561c0f0aa..3665f9b035bb 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -814,7 +814,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
> return ERR_PTR(-ENXIO);
>
> /* Use DSM base address instead for stolen memory */
> - dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);
> + dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK;
> if (IS_DG1(uncore->i915)) {
> lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
> if (WARN_ON(lmem_size < dsm_base))
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1a9bd829fc7e..9584a50ed612 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7953,6 +7953,7 @@ enum skl_power_gate {
>
> #define GEN12_GSMBASE _MMIO(0x108100)
> #define GEN12_DSMBASE _MMIO(0x1080C0)
> +#define GEN12_BDSM_MASK REG_GENMASK64(63, 20)
>
> #define XEHP_CLOCK_GATE_DIS _MMIO(0x101014)
> #define SGSI_SIDECLK_DIS REG_BIT(17)
>
--
--
Wayne Boyer
Graphics Software Engineer
VTT-OSGC Platform Enablement
next prev parent reply other threads:[~2022-09-20 19:16 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-16 17:36 [Intel-gfx] [PATCH v2 0/3] drm/i915: Improvements to stolen memory setup Lucas De Marchi
2022-09-16 17:36 ` [Intel-gfx] [PATCH v2 1/3] drm/i915: Add missing mask when reading GEN12_DSMBASE Lucas De Marchi
2022-09-20 19:16 ` Wayne Boyer [this message]
2022-09-16 17:36 ` [Intel-gfx] [PATCH v2 2/3] drm/i915: Split i915_gem_init_stolen() Lucas De Marchi
2022-09-20 19:16 ` Wayne Boyer
2022-09-16 17:36 ` [Intel-gfx] [PATCH v2 3/3] drm/i915/dgfx: Make failure to setup stolen non-fatal Lucas De Marchi
2022-09-20 19:18 ` Wayne Boyer
2022-09-16 19:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improvements to stolen memory setup (rev3) Patchwork
2022-09-16 19:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-17 0:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-09-22 13:55 ` Lucas De Marchi
2022-09-22 15:37 ` Vudum, Lakshminarayana
2022-09-22 14:45 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
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