From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3] drm/i915: clear error registers after error capture
Date: Thu, 30 Aug 2018 13:58:03 +0100 [thread overview]
Message-ID: <a43c157a-d810-6950-dc50-141e75ba086c@intel.com> (raw)
In-Reply-To: <153563066739.20543.9583946573804898343@skylake-alporthouse-com>
On 30/08/2018 13:04, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-08-30 12:55:32)
>> + if (INTEL_GEN(dev_priv) >= 8) {
>> + struct intel_engine_cs *engine;
>> + enum intel_engine_id id;
>> +
>> + for_each_engine(engine, dev_priv, id) {
>> + I915_WRITE(RING_FAULT_REG(engine),
>> + I915_READ(RING_FAULT_REG(engine)) &
>> + ~RING_FAULT_VALID);
>> + }
>> + POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS]));
>> + } else if (INTEL_GEN(dev_priv) >= 6) {
>> + I915_WRITE(GEN8_RING_FAULT_REG,
>> + I915_READ(GEN8_RING_FAULT_REG) & ~RING_FAULT_VALID);
>> + POSTING_READ(GEN8_RING_FAULT_REG);
>> + }
> Reversed! gen8 has the single reg, gen6 has one per engine.
> -Chris
>
Oh... I'm really sorry...
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next prev parent reply other threads:[~2018-08-30 12:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-30 11:55 [PATCH v3] drm/i915: clear error registers after error capture Lionel Landwerlin
2018-08-30 12:04 ` Chris Wilson
2018-08-30 12:58 ` Lionel Landwerlin [this message]
2018-08-30 13:01 ` ✗ Fi.CI.SPARSE: warning for drm/i915: clear error registers after error capture (rev3) Patchwork
2018-08-30 13:21 ` ✓ Fi.CI.BAT: success " Patchwork
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