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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Naladala Ramanaidu <ramanaidu.naladala@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	ankit.k.nautiyal@intel.com
Subject: Re: [PATCH v1] drm/i915: Add fallback for CDCLK selection when min_cdclk is too high
Date: Fri, 17 Oct 2025 16:22:48 +0300	[thread overview]
Message-ID: <aPJDKDuuUWfL6FaU@intel.com> (raw)
In-Reply-To: <20251017114821.780466-1-ramanaidu.naladala@intel.com>

On Fri, Oct 17, 2025 at 05:18:21PM +0530, Naladala Ramanaidu wrote:
> In cases where the requested minimum CDCLK exceeds all available
> values for the current reference clock, the CDCLK selection logic
> previously returned 0. This could result coverity division or
> modulo by zero issue.
> 
> This change introduces a fallback mechanism that selects the last
> valid CDCLK value associated with the current reference clock. A
> warning is logged to indicate that the minimum requirement could
> not be satisfied, and a safe fallback value is used instead.
> 
> Fixes: Coverity CID 2628056
> 
> Signed-off-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index e92e7fd9fd13..a90b602a40c4 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1551,17 +1551,21 @@ static int cdclk_divider(int cdclk, int vco, u16 waveform)
>  static int bxt_calc_cdclk(struct intel_display *display, int min_cdclk)
>  {
>  	const struct intel_cdclk_vals *table = display->cdclk.table;
> -	int i;
> +	int i, last_valid_cdclk = 0;
>  
> -	for (i = 0; table[i].refclk; i++)
> +	for (i = 0; table[i].refclk; i++) {
>  		if (table[i].refclk == display->cdclk.hw.ref &&
>  		    table[i].cdclk >= min_cdclk)
>  			return table[i].cdclk;
>  
> +		if (table[i].refclk == display->cdclk.hw.ref)
> +			last_valid_cdclk = table[i].cdclk;
> +	}
> +
>  	drm_WARN(display->drm, 1,
> -		 "Cannot satisfy minimum cdclk %d with refclk %u\n",
> -		 min_cdclk, display->cdclk.hw.ref);
> -	return 0;

Will never happen because we never pass in a min_cdclk that
high into this function.

At some point I was thinking of determining the max cdclk via
'calc_cdclk(INT_MAX)' to get rid of some of the magic numbers
in intel_update_max_cdclk(). But I think in some cases the table
will contain values >max_cdclk anyway, so that probably is
not going to fly anyway.

So without that I don't think we really need this much
complexity and you could just do:

- return 0;
+ return display->cdclk.max_cdclk_freq;

> +		 "Cannot satisfy minimum cdclk %d with refclk %u, falling back to %d\n",
> +		 min_cdclk, display->cdclk.hw.ref, last_valid_cdclk);
> +	return last_valid_cdclk;
>  }
>  
>  static int bxt_calc_cdclk_pll_vco(struct intel_display *display, int cdclk)
> -- 
> 2.43.0

-- 
Ville Syrjälä
Intel

  parent reply	other threads:[~2025-10-17 13:22 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-17 11:48 [PATCH v1] drm/i915: Add fallback for CDCLK selection when min_cdclk is too high Naladala Ramanaidu
2025-10-17 13:03 ` ✓ i915.CI.BAT: success for " Patchwork
2025-10-17 13:22 ` Ville Syrjälä [this message]
2025-10-17 15:05 ` [PATCH v2] " Naladala Ramanaidu
2025-10-28 12:07   ` Kahola, Mika
2025-10-29  8:05     ` Naladala, Ramanaidu
2025-10-17 16:44 ` ✓ i915.CI.BAT: success for drm/i915: Add fallback for CDCLK selection when min_cdclk is too high (rev2) Patchwork
2025-10-18  1:21 ` ✗ i915.CI.Full: failure " Patchwork

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