Re: [PATCH 15/50] drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16()

[Imre Deak <imre.deak@intel.com>]

On Mon, Dec 15, 2025 at 02:08:04PM +0200, Luca Coelho wrote:
> On Mon, 2025-12-15 at 14:00 +0200, Imre Deak wrote:
> > On Mon, Dec 15, 2025 at 09:49:45AM +0200, Luca Coelho wrote:
> > > On Thu, 2025-11-27 at 19:49 +0200, Imre Deak wrote:
> > > > Factor out align_max_vesa_compressed_bpp_x16(), also used later for
> > > > computing the maximum DSC compressed BPP limit.
> > > > 
> > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_dp.c | 35 ++++++++++++++-----------
> > > >  1 file changed, 20 insertions(+), 15 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > index dcb9bc11e677b..3111758578d6c 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > @@ -867,10 +867,23 @@ small_joiner_ram_size_bits(struct intel_display *display)
> > > >  		return 6144 * 8;
> > > >  }
> > > >  
> > > > +static int align_max_vesa_compressed_bpp_x16(int max_link_bpp_x16)
> > > > +{
> > > > +	int i;
> > > > +
> > > > +	for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) {
> > > > +		int vesa_bpp_x16 = fxp_q4_from_int(valid_dsc_bpp[i]);
> > > 
> > > Any reason why you're doing the loop from the end to the beginning,
> > > instead of the more natural from 0 to the end?
> > 
> > Yes. The values in valid_dsc_bpp[] are stored in increasing order, so to
> > find the maximum value <= the passed-in limit, the natural iteration
> > order is from the end of the array.
> 
> I don't really see how this affects anything functionally and by
> "natural" I meant for the person reading the code.  I had to think a
> bit deeper when reviewing this loop because it's not the "for (i = 0; i
> < ARRAY_SIZE(...); i++)" format I'm mostly used to.

Yes, I also meant more natural from the reviewer POV. The forward
iteration wouldn't be obvious for three reasons: it iterates only
through ARRAY_SIZE()-1 elements not ARRAY_SIZE elemts, in iteration "i"
it must check the array element at index i+1 not at index i and it also
depends an extra check outside of the loop to return 0 if even the first
element of the array is above the passed-in limit. 

> Anyway, another nitpick with not functional issues, so:
> 
> Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
> 
> --
> Cheers,
> Luca.
> 
> 
> 
> > > I think this is clearer and less prone to mistakes:
> > > 
> > > 	for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) {...}
> > > 
> > > 
> > > > +
> > > > +		if (vesa_bpp_x16 <= max_link_bpp_x16)
> > > > +			return vesa_bpp_x16;
> > > > +	}
> > > > +
> > > > +	return 0;
> > > > +}
> > > > +
> > > >  static u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp)
> > > >  {
> > > >  	u32 bits_per_pixel = bpp;
> > > > -	int i;
> > > >  
> > > >  	/* Error out if the max bpp is less than smallest allowed valid bpp */
> > > >  	if (bits_per_pixel < valid_dsc_bpp[0]) {
> > > > @@ -899,15 +912,13 @@ static u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp
> > > >  		}
> > > >  		bits_per_pixel = min_t(u32, bits_per_pixel, 27);
> > > >  	} else {
> > > > +		int link_bpp_x16 = fxp_q4_from_int(bits_per_pixel);
> > > > +
> > > >  		/* Find the nearest match in the array of known BPPs from VESA */
> > > > -		for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp) - 1; i++) {
> > > > -			if (bits_per_pixel < valid_dsc_bpp[i + 1])
> > > > -				break;
> > > > -		}
> > > > -		drm_dbg_kms(display->drm, "Set dsc bpp from %d to VESA %d\n",
> > > > -			    bits_per_pixel, valid_dsc_bpp[i]);
> > > > +		link_bpp_x16 = align_max_vesa_compressed_bpp_x16(link_bpp_x16);
> > > >  
> > > > -		bits_per_pixel = valid_dsc_bpp[i];
> > > > +		drm_WARN_ON(display->drm, fxp_q4_to_frac(link_bpp_x16));
> > > > +		bits_per_pixel = fxp_q4_to_int(link_bpp_x16);
> > > >  	}
> > > >  
> > > >  	return bits_per_pixel;
> > > > @@ -2219,7 +2230,6 @@ int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector)
> > > >  bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16)
> > > >  {
> > > >  	struct intel_display *display = to_intel_display(intel_dp);
> > > > -	int i;
> > > >  
> > > >  	if (DISPLAY_VER(display) >= 13) {
> > > >  		if (intel_dp->force_dsc_fractional_bpp_en && !fxp_q4_to_frac(bpp_x16))
> > > > @@ -2231,12 +2241,7 @@ bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16)
> > > >  	if (fxp_q4_to_frac(bpp_x16))
> > > >  		return false;
> > > >  
> > > > -	for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) {
> > > > -		if (fxp_q4_to_int(bpp_x16) == valid_dsc_bpp[i])
> > > > -			return true;
> > > > -	}
> > > > -
> > > > -	return false;
> > > > +	return align_max_vesa_compressed_bpp_x16(bpp_x16) == bpp_x16;
> > > >  }
> > > >  
> > > >  /*