From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
dri-devel@lists.freedesktop.org
Cc: Brian Vincent <brainn@gmail.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/5] drm/dp/mst: Configure no_stop_bit correctly for remote i2c xfers
Date: Fri, 07 Dec 2018 12:45:25 -0800 [thread overview]
Message-ID: <ac9aaed5b2ea5012b750422b9c7d2fdebada61a8.camel@intel.com> (raw)
In-Reply-To: <20180928180403.22499-1-ville.syrjala@linux.intel.com>
On Fri, 2018-09-28 at 21:03 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We aren't supposed to force a stop+start between every i2c msg
> when performing multi message transfers. This should eg. cause
> the DDC segment address to be reset back to 0 between writing
> the segment address and reading the actual EDID extension block.
>
> To quote the E-DDC spec:
> "... this standard requires that the segment pointer be
> reset to 00h when a NO ACK or a STOP condition is received."
Related question, do you know why the segment and ddc addresses are
defined as 0x30 and 0x50? The E-DDC spec says they should be at 0x60
and 0xA0/0xA1.
>
> Since we're going to touch this might as well consult the
> I2C_M_STOP flag to determine whether we want to force the stop
> or not.
Reviewing this took a lot of spec reading than I expected.
Setting the no_stop_bit after writing the segment address makes sense.
I have one concern though. drm_do_probe_ddc_edid does not make use of
the I2C_M_STOP flag, which in turn means we won't reset the no_stop_bit
at the end of edid read. Pass the i2c stop flag from the caller?
>
> Cc: Brian Vincent <brainn@gmail.com>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=108081
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 5ff1d79b86c4..3b400eab18a2 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -3276,6 +3276,7 @@ static int drm_dp_mst_i2c_xfer(struct
> i2c_adapter *adapter, struct i2c_msg *msgs
> msg.u.i2c_read.transactions[i].i2c_dev_id =
> msgs[i].addr;
> msg.u.i2c_read.transactions[i].num_bytes = msgs[i].len;
> msg.u.i2c_read.transactions[i].bytes = msgs[i].buf;
> + msg.u.i2c_read.transactions[i].no_stop_bit =
> !(msgs[i].flags & I2C_M_STOP);
> }
> msg.u.i2c_read.read_i2c_device_id = msgs[num - 1].addr;
> msg.u.i2c_read.num_bytes_read = msgs[num - 1].len;
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next prev parent reply other threads:[~2018-12-07 20:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-28 18:03 [PATCH 1/5] drm/dp/mst: Configure no_stop_bit correctly for remote i2c xfers Ville Syrjala
2018-09-28 18:04 ` [PATCH 2/5] drm/dp/mst: Validate REMOTE_I2C_READ harder Ville Syrjala
2018-12-07 23:11 ` Dhinakaran Pandiyan
2018-09-28 18:04 ` [PATCH 3/5] drm/dp: Implement I2C_M_STOP for i2c-over-aux Ville Syrjala
2018-12-11 2:47 ` Dhinakaran Pandiyan
2018-12-12 10:30 ` Daniel Vetter
2018-12-12 12:12 ` Ville Syrjälä
2018-09-28 18:04 ` [PATCH 4/5] drm/dp/mst: Provide defines for ACK vs. NAK reply type Ville Syrjala
2018-12-08 0:22 ` [Intel-gfx] " Dhinakaran Pandiyan
2018-09-28 18:04 ` [PATCH 5/5] drm/dp/mst: Provide better debugs for NAK replies Ville Syrjala
2018-09-28 21:55 ` kbuild test robot
2018-12-08 0:57 ` [Intel-gfx] " Dhinakaran Pandiyan
2018-12-08 1:05 ` Dhinakaran Pandiyan
2018-10-01 11:55 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/dp/mst: Configure no_stop_bit correctly for remote i2c xfers Patchwork
2018-10-01 12:18 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-01 13:56 ` ✓ Fi.CI.IGT: " Patchwork
2018-12-07 20:45 ` Dhinakaran Pandiyan [this message]
2018-12-07 22:52 ` [Intel-gfx] [PATCH 1/5] " Dhinakaran Pandiyan
2018-12-10 16:39 ` Ville Syrjälä
2018-12-10 20:09 ` [Intel-gfx] " Dhinakaran Pandiyan
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