From: Chris Wilson <chris@chris-wilson.co.uk>
To: Keith Packard <keithp@keithp.com>, intel-gfx@lists.freedesktop.org
Cc: stable@kernel.org
Subject: Re: [Intel-gfx] [PATCH fixes] drm/i915: Fix unfenced alignment on pre-G33 hardware
Date: Mon, 06 Jun 2011 18:50:16 +0100 [thread overview]
Message-ID: <aefc95$9lpel@orsmga001.jf.intel.com> (raw)
In-Reply-To: <yunlixf0wx9.fsf@aiko.keithp.com>
On Mon, 06 Jun 2011 09:03:30 -0700, Keith Packard <keithp@keithp.com> wrote:
> On Mon, 6 Jun 2011 15:18:44 +0100, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> > case I915_PARAM_HAS_RELAXED_FENCING:
> > - value = 1;
> > + value = 2;
>
> This looks like a change in ABI to me. I think this means you want a new
> ioctl so that applications using the existing HAS_RELAXED_FENCING ioctl
> and expecting a boolean will continue to work.
Hah. Anyway it is actually irrelevant as it turns out, the kernel is broken
with any per-surface tiling on gen2/gen3.
> > uint32_t
> > -i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj);
> > +i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj,
> > + int tiling_mode);
> ...
> > - i915_gem_get_unfenced_gtt_alignment(obj);
> > + i915_gem_get_unfenced_gtt_alignment(obj,
> > + args->tiling_mode);
>
> This combination looks like a simple bug fix -- not using the new tiling
> mode when computing the required alignment. Can you separate out this
> From the power-of-two change?
Yes, I can. But the simple bug fix doesn't fix anything without the other
chunk. Do you still want it split?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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next prev parent reply other threads:[~2011-06-06 17:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-06 14:18 [PATCH fixes] drm/i915: Fix unfenced alignment on pre-G33 hardware Chris Wilson
2011-06-06 16:03 ` Keith Packard
2011-06-06 17:50 ` Chris Wilson [this message]
2011-06-06 18:09 ` Keith Packard
2011-06-06 20:56 ` Chris Wilson
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