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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Jani Nikula <jani.nikula@intel.com>,
	Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>,
	intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/display: enable ccs modifiers on dg2
Date: Thu, 23 Apr 2026 14:27:01 +0300	[thread overview]
Message-ID: <aeoCBQ59P1ajGxMa@intel.com> (raw)
In-Reply-To: <fc60cf57-0662-4c40-8d70-190910d780ad@igalia.com>

On Thu, Apr 23, 2026 at 12:15:14PM +0100, Tvrtko Ursulin wrote:
> 
> On 23/04/2026 11:28, Jani Nikula wrote:
> > On Thu, 23 Apr 2026, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote:
> >> Since Xe driver aux ccs enablement dg2 ccs modifiers have been
> >> disabled on both Xe and i915 drivers. Here allow dg2 to use
> >> ccs again for framebuffers.
> >>
> >> Fixes: 6a99e91 ("drm/i915/display: Detect AuxCCS support via display parent interface")
> >> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> >> ---
> >>   drivers/gpu/drm/i915/i915_driver.c | 5 ++++-
> >>   1 file changed, 4 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> >> index d31819758f3d..7a73461d398a 100644
> >> --- a/drivers/gpu/drm/i915/i915_driver.c
> >> +++ b/drivers/gpu/drm/i915/i915_driver.c
> >> @@ -54,9 +54,11 @@
> >>   #include "display/intel_bw.h"
> >>   #include "display/intel_cdclk.h"
> >>   #include "display/intel_crtc.h"
> >> +#include "display/intel_display_core.h"
> >>   #include "display/intel_display_device.h"
> >>   #include "display/intel_display_driver.h"
> >>   #include "display/intel_display_power.h"
> >> +#include "display/intel_display_types.h"
> >>   #include "display/intel_dmc.h"
> >>   #include "display/intel_dp.h"
> >>   #include "display/intel_dpt.h"
> >> @@ -749,8 +751,9 @@ static void fence_priority_display(struct dma_fence *fence)
> >>   static bool has_auxccs(struct drm_device *drm)
> >>   {
> >>   	struct drm_i915_private *i915 = to_i915(drm);
> >> +	struct intel_display *display = i915->display;
> >>   
> >> -	return IS_GRAPHICS_VER(i915, 9, 12) ||
> >> +	return IS_DISPLAY_VER(display, 9, 12) ||
> > 
> > Sorry, can't do this in i915 core.
> 
> Was DG2 never Gen12? I totally forgot.. my bad.. Adding IS_DG2 to the 
> checks below should work, no?

I think just exclude HAS_FLAT_CCS.

> 
> Regards,
> 
> Tvrtko
> 
> > 
> > BR,
> > Jani.
> > 
> >>   	       IS_ALDERLAKE_P(i915) ||
> >>   	       IS_METEORLAKE(i915);
> >>   }
> > 

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2026-04-23 11:27 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-23 10:17 [PATCH] drm/i915/display: enable ccs modifiers on dg2 Juha-Pekka Heikkila
2026-04-23 10:28 ` Jani Nikula
2026-04-23 11:15   ` Tvrtko Ursulin
2026-04-23 11:27     ` Ville Syrjälä [this message]
2026-04-23 20:42     ` Matt Roper
2026-04-23 10:45 ` Ville Syrjälä
2026-04-23 11:05 ` ✓ i915.CI.BAT: success for " Patchwork
2026-04-23 15:39 ` ✗ i915.CI.Full: failure " Patchwork

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