[PULL] drm-intel-next

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

Hi Dave and Sima,

Here goes our first drm-intel PR towards 7.4.

Thanks,
Rodrigo.

drm-intel-next-2026-09-03:
Xe related:
 - Some clean-ups around drm/xe/display (Jani)

Display in general:
 - Regular clean-ups (Jani)
 - Enable CMRR (Content Match Refresh Rate) in fixed-RR VRR path (Mitul)
 - Switch DG2 Multi-protocol PLL (MPLLB) to the DPLL framework (Mika)
 - DP-HDMI PCON DSC fixes (Ankit)
 - Remove duplicated call introduced by a bad cherry-pick (Chaitanya)
 - Limit invalid joiner combinations harder (Jani)
 - Fix value being written to DDI_CLK_VALFREQ (Suraj)
 - Harden some bit-shifting operations (Luca)
 - Clear SEL_FETCH_PLANE_CTL on plane disable (Nemesa)
 - Update CURSOR_BUF/WM masks (Suraj)
 - CDCLK related fixes and refactor specially around PCODE interaction (Ville)
 - Reduce clock_gating interface between core and display (Luca)
 - Gate UHBR SST SDP splitting on sink capability (Mitul)
 - Enable joiner cursor fast updates (Nemesa)
 - Cear the Panel Replay error status register (Jake)
 - Add HDMI TMDS audio bandwidth check (Chaitanya)
 - Reset use_flipq when duplicating crtc state (Mika)

Beyond display:
 - Guard against NULL driver_data (Deepanshu)
 - Rename GEN6_PCODE_DATA to match spec (Michal)
The following changes since commit f0cabcc880aba3f05ca59d735f6d166b7fceca80:

  drm/i915/fbc: No surface size restrictions from LNL onwards (2026-07-24 11:48:36 +0300)

are available in the Git repository at:

  https://gitlab.freedesktop.org/drm/i915/kernel.git tags/drm-intel-next-2026-09-03

for you to fetch changes up to 0d63d6fc993b1fb97e314f435bdefbf0ccd947bd:

  drm/i915/display: Reset use_flipq when duplicating crtc state (2026-09-03 10:17:54 +0300)

----------------------------------------------------------------
Xe related:
 - Some clean-ups around drm/xe/display (Jani)

Display in general:
 - Regular clean-ups (Jani)
 - Enable CMRR (Content Match Refresh Rate) in fixed-RR VRR path (Mitul)
 - Switch DG2 Multi-protocol PLL (MPLLB) to the DPLL framework (Mika)
 - DP-HDMI PCON DSC fixes (Ankit)
 - Remove duplicated call introduced by a bad cherry-pick (Chaitanya)
 - Limit invalid joiner combinations harder (Jani)
 - Fix value being written to DDI_CLK_VALFREQ (Suraj)
 - Harden some bit-shifting operations (Luca)
 - Clear SEL_FETCH_PLANE_CTL on plane disable (Nemesa)
 - Update CURSOR_BUF/WM masks (Suraj)
 - CDCLK related fixes and refactor specially around PCODE interaction (Ville)
 - Reduce clock_gating interface between core and display (Luca)
 - Gate UHBR SST SDP splitting on sink capability (Mitul)
 - Enable joiner cursor fast updates (Nemesa)
 - Cear the Panel Replay error status register (Jake)
 - Add HDMI TMDS audio bandwidth check (Chaitanya)
 - Reset use_flipq when duplicating crtc state (Mika)

Beyond display:
 - Guard against NULL driver_data (Deepanshu)
 - Rename GEN6_PCODE_DATA to match spec (Michal)

----------------------------------------------------------------
Ankit Nautiyal (5):
      drm/i915/hdmi: Use correct type for output_format parameter
      drm/i915/display: Generalize intel_hdmi_dsc_get_num_slices helper
      drm/i915/{dp,hdmi}: Pass bpc in intel_hdmi_dsc_get_bpp
      drm/i915/hdmi: Add helper to get max FRL rate for an HDMI sink
      drm/i915/dp: Use helpers for getting max FRL rate

Chaitanya Kumar Borah (3):
      drm/i915/dp_mst: Remove duplicate intel_pfit_compute_config() call
      drm/i915/hdmi: Move audio compute config after format selection
      drm/i915/audio: Prune ELD SADs based on HDMI audio bandwidth

Deepanshu Kartikey (1):
      drm/i915: Guard against NULL driver_data in i915_pci_probe()

Jake Steinman (1):
      drm/i915/psr: clear the Panel Replay error status register

Jani Nikula (11):
      drm/xe/display: remove unnecessary includes
      drm/i915/dpt: remove unused include
      drm/{i915,xe}/display: move transient data flush call to display parent interface
      drm/xe/display: drop redundant intel_hpd_poll_fini() call
      drm/xe/display: drop redundant intel_hdcp_component_fini() call
      drm/xe/display: drop redundant intel_audio_deinit() call
      drm/{i915,xe}/display: add core workaround query to display parent interface
      drm/i915/display: Limit max joined dotclock on joiner pipes available
      drm/i915/dp: Limit for_each_joiner_candidate() on joiner pipes available
      drm/i915/dp: Limit compute config joining to pipes that can actually join
      drm/i915/debugfs: Reject invalid force_joined_pipes harder

Luca Coelho (7):
      drm/i915/display: harden masks in HSW_AUD_PIN_ELD_CP_VLD macros
      drm/i915/display: harden shifts in ICL_DPCLKA_CFGCR0_DDI_CLK_SEL macros
      drm/i915/display: harden shift in intel_ddi_compute_config_late()
      drm/i915/display: remove unnecessary PHY_NONE definition
      drm/i915/display: consolidate Gen9 clock gating initialization
      drm/i915/display: consolidate remaining clock gating initialization
      drm/i915/display: remove unnecessary clock_gating include from intel_display.c

Michał Grzelak (1):
      drm/i915/pcode: rename GEN6_PCODE_DATA to match spec

Mika Kahola (5):
      drm/i915/display: Split out DG2 MPLLB enable helper
      drm/i915/display: Add DG2 MPLLB DPLL manager support
      drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework
      drm/i915/display: Switch DG2 to use DPLL framework
      drm/i915/display: Reset use_flipq when duplicating crtc state

Mitul Golani (11):
      drm/i915/psr: Do not enable PSR2 when CMRR is enabled
      drm/i915/vrr: Restrict CMRR enable condition to VRR-TG-default platforms
      drm/i915/vrr: Add per-CRTC vrr/cmrr debugfs control
      drm/i915/vrr: Update AS_SDP target_rr_divider based on CMRR config request
      drm/i915/display: Move CMRR crtc_state members under VRR
      drm/i915/vrr: Compute CMRR fractional timings generically
      drm/i915/vrr: Latch CMRR ratio via atomic commit on debugfs write
      drm/i915/vrr: Program CMRR enable/disable from transcoder timings
      drm/i915/vrr: Dump CMRR state in the crtc state dump
      drm/i915/vrr: Enable CMRR
      drm/i915/dp: Gate UHBR SST SDP splitting on sink capability

Nemesa Garg (6):
      drm/i915/display: Clear SEL_FETCH_PLANE_CTL on plane disable
      drm/i915/cursor: Check joiner cursor commit status
      drm/i915/cursor: Add helper to update cursor plane
      drm/i915/cursor: Handle secondary cursor state
      drm/i915/cursor: Program secondary cursor planes
      drm/i915/cursor: Allow joiner cursor fast path update

Suraj Kandpal (4):
      drm/i915/ddi: add helper to compute DDI clock frequency
      drm/i915/cx0: program DDI_CLK_VALFREQ with DDI clock frequency
      drm/i915/lt_phy: program DDI_CLK_VALFREQ with DDI clock frequency
      drm/i915/xe3p_lpd: Update CURSOR_BUF/WM masks

Ville Syrjälä (17):
      drm/i915/cdclk: Avoid spurious cdclk sanitization on PTL+
      drm/i915/cdclk: Introduce has_cd2x_pipe_select()
      drm/i915/cdclk: Fix dg2_power_well_count() return type
      drm/i915/cdclk: Don't bail if pcode post nofify fails
      drm/i915/cdclk: Pass CDCLK in MHz to pcode on DG2
      drm/i915/cdclk: Do the DG2 CDCLK/pipe power well notify properly
      drm/i915/cdclk: Notify DG2 pcode about pipe power wells regardless of CDCLK
      drm/i915/cdclk: Stop forcing voltage level to 3 all the time on DG2
      drm/i915/cdclk: Drop pointless platform check from bxt_set_cdclk()
      drm/i915/cdclk: s/intel_/dg2_/ for DG2 specific stuff
      drm/i915/cdclk: Unify the pcode pre/post notify in bxt_set_cdclk()
      drm/i915/cdclk: Unify pcode related debugs
      drm/i915/cdclk: Extract bdw_cdclk_pcode_{pre,post}_notify()
      drm/i915/cdclk: Extract skl_cdclk_pcode_{pre,post}_notify()
      drm/i915/cdclk: Extract bxt_cdclk_pcode_{pre,post}_notify()
      drm/i915/cdclk: Introduce CDCLK .{pre,post}_notify() vfuncs
      drm/i915/cdclk: Hoist intel_cdclk_{pre,post}_notify() calls upwards

 drivers/gpu/drm/i915/display/intel_atomic.c        |   1 +
 drivers/gpu/drm/i915/display/intel_audio.c         | 153 ++++++++
 drivers/gpu/drm/i915/display/intel_audio_regs.h    |  16 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c         | 334 +++++++++--------
 drivers/gpu/drm/i915/display/intel_cmtg.c          |   2 +-
 .../gpu/drm/i915/display/intel_crtc_state_dump.c   |   3 +
 drivers/gpu/drm/i915/display/intel_cursor.c        | 311 ++++++++++++----
 drivers/gpu/drm/i915/display/intel_cursor_regs.h   |   8 +-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c       |   5 +-
 drivers/gpu/drm/i915/display/intel_ddi.c           |  47 ++-
 drivers/gpu/drm/i915/display/intel_ddi.h           |   1 +
 drivers/gpu/drm/i915/display/intel_display.c       |  76 +++-
 drivers/gpu/drm/i915/display/intel_display.h       |   3 +-
 .../drm/i915/display/intel_display_clock_gating.c  |  67 +++-
 .../drm/i915/display/intel_display_clock_gating.h  |  16 +-
 .../gpu/drm/i915/display/intel_display_debugfs.c   |  21 +-
 .../drm/i915/display/intel_display_power_well.c    |   6 +-
 drivers/gpu/drm/i915/display/intel_display_regs.h  |  18 +-
 drivers/gpu/drm/i915/display/intel_display_types.h |  19 +-
 drivers/gpu/drm/i915/display/intel_display_wa.c    |   4 +-
 drivers/gpu/drm/i915/display/intel_display_wa.h    |   9 -
 drivers/gpu/drm/i915/display/intel_dp.c            |  96 +++--
 drivers/gpu/drm/i915/display/intel_dp_mst.c        |   8 +-
 drivers/gpu/drm/i915/display/intel_dpll.c          |  22 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c      | 221 +++++++++++-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h      |  22 ++
 drivers/gpu/drm/i915/display/intel_frontbuffer.c   |   3 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c          |  53 ++-
 drivers/gpu/drm/i915/display/intel_hdmi.h          |  11 +-
 drivers/gpu/drm/i915/display/intel_hti.c           |   3 -
 drivers/gpu/drm/i915/display/intel_lt_phy.c        |   6 +-
 .../gpu/drm/i915/display/intel_modeset_verify.c    |   1 -
 drivers/gpu/drm/i915/display/intel_parent.c        |  10 +-
 drivers/gpu/drm/i915/display/intel_parent.h        |   3 +-
 drivers/gpu/drm/i915/display/intel_psr.c           |  18 +-
 drivers/gpu/drm/i915/display/intel_snps_phy.c      |  60 +---
 drivers/gpu/drm/i915/display/intel_snps_phy.h      |   2 +
 drivers/gpu/drm/i915/display/intel_tdf.h           |  25 --
 drivers/gpu/drm/i915/display/intel_vrr.c           | 395 ++++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_vrr.h           |   2 +
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  15 +-
 drivers/gpu/drm/i915/gvt/handlers.c                |   2 +-
 drivers/gpu/drm/i915/i915_dpt.c                    |   1 -
 drivers/gpu/drm/i915/i915_pci.c                    |   3 +
 drivers/gpu/drm/i915/i915_reg.h                    |   2 +-
 drivers/gpu/drm/i915/intel_clock_gating.c          |  30 +-
 drivers/gpu/drm/i915/intel_gvt_mmio_table.c        |   2 +-
 drivers/gpu/drm/i915/intel_pcode.c                 |  14 +-
 drivers/gpu/drm/i915/intel_pcode.h                 |   2 +-
 drivers/gpu/drm/xe/Makefile                        |   3 +-
 drivers/gpu/drm/xe/display/xe_display.c            |  22 +-
 drivers/gpu/drm/xe/display/xe_display_rpm.c        |   2 -
 drivers/gpu/drm/xe/display/xe_display_wa.c         |  13 +-
 drivers/gpu/drm/xe/display/xe_display_wa.h         |   9 +
 drivers/gpu/drm/xe/display/xe_tdf.c                |  15 -
 include/drm/intel/display_parent_interface.h       |  15 +-
 56 files changed, 1591 insertions(+), 640 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h
 create mode 100644 drivers/gpu/drm/xe/display/xe_display_wa.h
 delete mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c