From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Clear rc6 residency trackers across suspend
Date: Tue, 14 Jan 2020 11:17:55 +0000 [thread overview]
Message-ID: <b23d97f5-4819-8b86-1507-7304649f2d30@linux.intel.com> (raw)
In-Reply-To: <20200114105648.2172026-2-chris@chris-wilson.co.uk>
On 14/01/2020 10:56, Chris Wilson wrote:
> On suspend, the rc6 residency counters (stored in HW registers) will be
> lost and cleared. However, we keep track of the rc6 residency to provide
> a continuous 64b sampling, and if we see the HW value go backwards, we
> assume it overflowed and add on 32b/40b -- an interesting artifact when
> sampling across suspend.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_rc6.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
> index 9e303c29d6e3..04eeb7740e53 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> @@ -542,6 +542,8 @@ void intel_rc6_init(struct intel_rc6 *rc6)
>
> void intel_rc6_sanitize(struct intel_rc6 *rc6)
> {
> + memset(rc6->prev_hw_residency, 0, sizeof(rc6->prev_hw_residency));
> +
> if (rc6->enabled) { /* unbalanced suspend/resume */
> rpm_get(rc6);
> rc6->enabled = false;
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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next prev parent reply other threads:[~2020-01-14 11:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 10:56 [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Correct the rc6 offset upon enabling Chris Wilson
2020-01-14 10:56 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Clear rc6 residency trackers across suspend Chris Wilson
2020-01-14 11:17 ` Tvrtko Ursulin [this message]
2020-01-14 11:06 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Correct the rc6 offset upon enabling Chris Wilson
2020-01-14 11:37 ` Tvrtko Ursulin
2020-01-14 11:45 ` Tvrtko Ursulin
2020-01-14 11:49 ` Chris Wilson
2020-01-14 12:37 ` Tvrtko Ursulin
2020-01-14 11:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2020-01-14 11:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-16 14:16 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
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