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From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>,
	"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "juhapekka.heikkila@intel.com" <juhapekka.heikkila@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Syrjala, Ville" <ville.syrjala@intel.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v7 2/2] drm/i915: Adding YUV444 packed format(DRM_FORMAT_XYUV) support.
Date: Thu, 30 Aug 2018 11:15:25 -0700	[thread overview]
Message-ID: <b471640c701cf0b5ff4bfb91cab6d4e95e342436.camel@intel.com> (raw)
In-Reply-To: <0f3e638318963c3ceecad518a667cc277b4f3e21.camel@intel.com>

On Thu, 2018-08-30 at 13:57 +0100, Lisovskiy, Stanislav wrote:
> On Wed, 2018-08-29 at 12:16 -0700, Dhinakaran Pandiyan wrote:
> > 
> > On Wed, 2018-08-29 at 21:10 +0300, Ville Syrjälä wrote:
> > > On Wed, Aug 29, 2018 at 02:28:47PM +0300, Stanislav Lisovskiy
> > > wrote:
> > > > PLANE_CTL_FORMAT_AYUV is already supported, according to
> > > > hardware
> > > > specification.
> > > > 
> > > > v2: Edited commit message, removed redundant whitespaces.
> > > > 
> > > > v3: Fixed fallthrough logic for the format switch cases.
> > > > 
> > > > v4: Yet again fixed fallthrough logic, to reuse code from other
> > > > case
> > > >     labels.
> > > > 
> > > > v5: Started to use XYUV instead of AYUV, as we don't use alpha.
Curious what the reason is. Is it because the hardware does not support
alpha with this format?

> > > > 
> > > > v6: Removed unneeded initializer for new XYUV format.
> > > > 
> > > > v7: Added scaling support for DRM_FORMAT_XYUV
> > 
> > I don't see yuv formats in skl_format_to_fourcc(), any idea why?
> 
> Good point. I guess would be nice idea to add at least XYUV there
> now.
> I can add rest of the formats with a separate patch afterwards.
Wonder if the expectation is BIOS not use yuv formats. Ville?

> 
> > 
> > Also, shouldn't plane_color_ctl_alpha() be updated?
> 
> I guess not, as we don't support alpha in that case.

Right, the default case should take care of setting
PLANE_CTL_ALPHA_DISABLE. I misread it.

> 
> > 
> > > > 
> > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.c
> > > > om
> > > > > 
> > > > 
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
> > > >  drivers/gpu/drm/i915/intel_sprite.c  | 1 +
> > > >  2 files changed, 9 insertions(+)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > index 30fdfd1a3037..3c96fa3a2b61 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > @@ -86,6 +86,7 @@ static const uint32_t skl_primary_formats[] =
> > > > {
> > > >  	DRM_FORMAT_YVYU,
> > > >  	DRM_FORMAT_UYVY,
> > > >  	DRM_FORMAT_VYUY,
> > > > +	DRM_FORMAT_XYUV,
> > > >  };
> > > >  
> > > >  static const uint32_t skl_pri_planar_formats[] = {
> > > > @@ -102,6 +103,7 @@ static const uint32_t
> > > > skl_pri_planar_formats[]
> > > > = {
> > > >  	DRM_FORMAT_UYVY,
> > > >  	DRM_FORMAT_VYUY,
> > > >  	DRM_FORMAT_NV12,
> > > > +	DRM_FORMAT_XYUV,
> > > 
> > > I would keep the NV12 at the end so that the arrays are easier to
> > > compare visually.
> > > 
> > > >  };
> > > >  
> > > >  static const uint64_t skl_format_modifiers_noccs[] = {
> > > > @@ -3501,6 +3503,8 @@ static u32 skl_plane_ctl_format(uint32_t
> > > > pixel_format)
> > > >  		return PLANE_CTL_FORMAT_XRGB_2101010;
> > > >  	case DRM_FORMAT_XBGR2101010:
> > > >  		return PLANE_CTL_ORDER_RGBX |
> > > > PLANE_CTL_FORMAT_XRGB_2101010;
> > > > +	case DRM_FORMAT_XYUV:
> > > > +		return PLANE_CTL_FORMAT_AYUV;
> > > 
> > > We should probably rename that define to XYUV as well since it
> > > doesn't
> > > support per-pixel alpha.
> > > 
> > > Since you've only implemented this for skl+ you chould mention
> > > that
> > > in the commit msg. IVB+ support should be equally trivial to
> > > implement (wink wink).
> > > 
> > > >  	case DRM_FORMAT_YUYV:
> > > >  		return PLANE_CTL_FORMAT_YUV422 |
> > > > PLANE_CTL_YUV422_YUYV;
> > > >  	case DRM_FORMAT_YVYU:
> > > > @@ -4959,6 +4963,7 @@ static int skl_update_scaler_plane(struct
> > > > intel_crtc_state *crtc_state,
> > > >  	case DRM_FORMAT_UYVY:
> > > >  	case DRM_FORMAT_VYUY:
> > > >  	case DRM_FORMAT_NV12:
> > > > +	case DRM_FORMAT_XYUV:
> > > >  		break;
> > > >  	default:
> > > >  		DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported
> > > > scaling format 0x%x\n",
> > > > @@ -13399,6 +13404,7 @@ static bool
> > > > skl_plane_format_mod_supported(struct drm_plane *_plane,
> > > >  	}
> > > >  
> > > >  	switch (format) {
> > > > +
> > > 
> > > Bogus whitespace.
> > > 
> > > >  	case DRM_FORMAT_XRGB8888:
> > > >  	case DRM_FORMAT_XBGR8888:
> > > >  	case DRM_FORMAT_ARGB8888:
> > > > @@ -13414,6 +13420,7 @@ static bool
> > > > skl_plane_format_mod_supported(struct drm_plane *_plane,
> > > >  	case DRM_FORMAT_UYVY:
> > > >  	case DRM_FORMAT_VYUY:
> > > >  	case DRM_FORMAT_NV12:
> > > > +	case DRM_FORMAT_XYUV:
> > > >  		if (modifier == I915_FORMAT_MOD_Yf_TILED)
> > > >  			return true;
> > > >  		/* fall through */
> > > > @@ -14540,6 +14547,7 @@ static int
> > > > intel_framebuffer_init(struct
> > > > intel_framebuffer *intel_fb,
> > > >  			goto err;
> > > >  		}
> > > >  		break;
> > > > +	case DRM_FORMAT_XYUV:
> > > 
> > > That's not the right spot if we want the platform checks to match
> > > your
> > > choice of skl+.
> > > 
> > > >  	case DRM_FORMAT_YUYV:
> > > >  	case DRM_FORMAT_UYVY:
> > > >  	case DRM_FORMAT_YVYU:
> > > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> > > > b/drivers/gpu/drm/i915/intel_sprite.c
> > > > index c286dda625e4..2ac9471974c2 100644
> > > > --- a/drivers/gpu/drm/i915/intel_sprite.c
> > > > +++ b/drivers/gpu/drm/i915/intel_sprite.c
> > > > @@ -1420,6 +1420,7 @@ static bool
> > > > skl_plane_format_mod_supported(struct drm_plane *_plane,
> > > >  	case DRM_FORMAT_UYVY:
> > > >  	case DRM_FORMAT_VYUY:
> > > >  	case DRM_FORMAT_NV12:
> > > > +	case DRM_FORMAT_XYUV:
> > > >  		if (modifier == I915_FORMAT_MOD_Yf_TILED)
> > > >  			return true;
> > > >  		/* fall through */
> > > > -- 
> > > > 2.17.0
> > > > 
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > 
> > > 
> 
> -- 
> Best Regards,
> 
> Lisovskiy Stanislav
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-08-30 18:15 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-29 11:28 [PATCH v7 0/2] Add XYUV format support Stanislav Lisovskiy
2018-08-29 11:28 ` [PATCH v7 1/2] drm: Introduce new DRM_FORMAT_XYUV Stanislav Lisovskiy
2018-08-29 11:28 ` [PATCH v7 2/2] drm/i915: Adding YUV444 packed format(DRM_FORMAT_XYUV) support Stanislav Lisovskiy
2018-08-29 18:10   ` [Intel-gfx] " Ville Syrjälä
2018-08-29 19:16     ` Dhinakaran Pandiyan
2018-08-30 12:57       ` Lisovskiy, Stanislav
2018-08-30 18:15         ` Dhinakaran Pandiyan [this message]
2018-08-31  7:24           ` [Intel-gfx] " Lisovskiy, Stanislav
2018-08-31 11:09             ` Ville Syrjälä
2018-08-29 11:34 ` ✗ Fi.CI.CHECKPATCH: warning for Add XYUV format support (rev3) Patchwork

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