From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
<intel-gfx@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency
Date: Fri, 23 Jul 2021 12:35:03 -0700 [thread overview]
Message-ID: <bdd4f6c1-90ad-cea2-442e-b59994e6856f@intel.com> (raw)
In-Reply-To: <e4a5657a-12f2-cb45-4021-47c9ebb36f2c@intel.com>
On 7/21/2021 10:42 AM, Michal Wajdeczko wrote:
>
>
> On 21.07.2021 18:11, Vinay Belgaumkar wrote:
>> Add param set h2g helpers to set the min and max frequencies
>> for use by SLPC.
>>
>> v2: Address review comments (Michal W)
>>
>> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 84 +++++++++++++++++++++
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 +
>> 2 files changed, 86 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> index 48db2a8f67d1..b40c39ba4049 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> @@ -109,6 +109,18 @@ static u32 slpc_get_state(struct intel_guc_slpc *slpc)
>> return data->header.global_state;
>> }
>>
>> +static int guc_action_slpc_set_param(struct intel_guc *guc, u8 id, u32 value)
>> +{
>> + u32 request[] = {
>> + INTEL_GUC_ACTION_SLPC_REQUEST,
>> + SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2),
>> + id,
>> + value,
>> + };
>> +
>> + return intel_guc_send(guc, request, ARRAY_SIZE(request));
>
> beware of possible non-zero data0 returned by guc_send()
Ok, added -EPROTO check.
>
>> +}
>> +
>> static bool slpc_is_running(struct intel_guc_slpc *slpc)
>> {
>> return (slpc_get_state(slpc) == SLPC_GLOBAL_STATE_RUNNING);
>> @@ -143,6 +155,15 @@ static int slpc_query_task_state(struct intel_guc_slpc *slpc)
>> return ret;
>> }
>>
>> +static int slpc_set_param(struct intel_guc_slpc *slpc, u8 id, u32 value)
>> +{
>> + struct intel_guc *guc = slpc_to_guc(slpc);
>> +
>> + GEM_BUG_ON(id >= SLPC_MAX_PARAM);
>> +
>> + return guc_action_slpc_set_param(guc, id, value);
>> +}
>> +
>> static const char *slpc_state_string(struct intel_guc_slpc *slpc)
>> {
>> const char *str = NULL;
>> @@ -238,6 +259,69 @@ u32 slpc_decode_max_freq(struct intel_guc_slpc *slpc)
>> GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER);
>> }
>>
>> +/**
>> + * intel_guc_slpc_set_max_freq() - Set max frequency limit for SLPC.
>> + * @slpc: pointer to intel_guc_slpc.
>> + * @val: frequency (MHz)
>> + *
>> + * This function will invoke GuC SLPC action to update the max frequency
>> + * limit for unslice.
>> + *
>> + * Return: 0 on success, non-zero error code on failure.
>> + */
>> +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val)
>> +{
>> + int ret;
>> + struct drm_i915_private *i915 = slpc_to_i915(slpc);
>> + intel_wakeref_t wakeref;
>
> nit: move "ret" as last
ok.
>
>> +
>> + with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
>> + ret = slpc_set_param(slpc,
>> + SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
>> + val);
>> + if (ret) {
>> + drm_err(&i915->drm,
>> + "Set max frequency unslice returned (%pe)\n", ERR_PTR(ret));
>> + /* Return standardized err code for sysfs */
>> + ret = -EIO;
>
> maybe caller (hook in sysfs) can sanitize this error ?
Caller will then need to check the error type - something like-
if (err) {
if (err != -EINVAL)
return -EIO;
}
Seems cleaner to return specific error type from here instead.
Anything other than -EINVAL or -EIO causes garbage in sysfs output.
Thanks,
Vinay.
>
> Michal
>
>> + }
>> + }
>> +
>> + return ret;
>> +}
>> +
>> +/**
>> + * intel_guc_slpc_set_min_freq() - Set min frequency limit for SLPC.
>> + * @slpc: pointer to intel_guc_slpc.
>> + * @val: frequency (MHz)
>> + *
>> + * This function will invoke GuC SLPC action to update the min unslice
>> + * frequency.
>> + *
>> + * Return: 0 on success, non-zero error code on failure.
>> + */
>> +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val)
>> +{
>> + int ret;
>> + struct intel_guc *guc = slpc_to_guc(slpc);
>> + struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>> + intel_wakeref_t wakeref;
>> +
>> + with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
>> + ret = slpc_set_param(slpc,
>> + SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
>> + val);
>> + if (ret) {
>> + drm_err(&i915->drm,
>> + "Set min frequency for unslice returned (%pe)\n", ERR_PTR(ret));
>> + /* Return standardized err code for sysfs */
>> + ret = -EIO;
>> + }
>> + }
>> +
>> + return ret;
>> +}
>> +
>> /*
>> * intel_guc_slpc_enable() - Start SLPC
>> * @slpc: pointer to intel_guc_slpc.
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> index f02249ff5f1b..3a1a7eaafc12 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> @@ -30,5 +30,7 @@ void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
>> int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
>> int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
>> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
>> +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
>> +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
>>
>> #endif
>>
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next prev parent reply other threads:[~2021-07-23 19:35 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 16:11 [Intel-gfx] [PATCH v2 00/14] drm/i915/guc: Enable GuC based power management features Vinay Belgaumkar
2021-07-21 16:11 ` [Intel-gfx] [PATCH 01/14] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar
2021-07-21 16:11 ` [Intel-gfx] [PATCH 02/14] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar
2021-07-21 17:24 ` Michal Wajdeczko
2021-07-22 0:56 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar
2021-07-21 16:11 ` [Intel-gfx] [PATCH 04/14] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar
2021-07-21 17:25 ` Michal Wajdeczko
2021-07-23 19:26 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar
2021-07-21 17:26 ` Michal Wajdeczko
2021-07-23 19:30 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar
2021-07-21 17:38 ` Michal Wajdeczko
2021-07-23 19:28 ` Belgaumkar, Vinay
2021-07-21 23:44 ` kernel test robot
2021-07-22 2:36 ` kernel test robot
2021-07-22 18:07 ` kernel test robot
2021-07-22 18:07 ` [Intel-gfx] [RFC PATCH] drm/i915/guc/slpc: slpc_decode_min_freq() can be static kernel test robot
2021-07-23 13:04 ` [Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events kernel test robot
2021-07-24 16:30 ` kernel test robot
2021-07-21 16:11 ` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-21 17:42 ` Michal Wajdeczko
2021-07-23 19:35 ` Belgaumkar, Vinay [this message]
2021-07-21 16:11 ` [Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-21 18:00 ` Michal Wajdeczko
2021-07-23 19:43 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-21 18:05 ` Michal Wajdeczko
2021-07-23 19:49 ` Belgaumkar, Vinay
2021-07-22 1:29 ` kernel test robot
2021-07-24 0:31 ` kernel test robot
2021-07-24 0:31 ` [Intel-gfx] [RFC PATCH] drm/i915/guc/slpc: intel_eval_slpc_support() can be static kernel test robot
2021-07-25 2:57 ` [Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info kernel test robot
2021-07-21 16:11 ` [Intel-gfx] [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-21 16:11 ` [Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar
2021-07-21 18:09 ` Michal Wajdeczko
2021-07-23 22:25 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar
2021-07-21 18:13 ` Michal Wajdeczko
2021-07-23 22:28 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar
2021-07-21 16:11 ` [Intel-gfx] [PATCH 14/14] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-21 18:21 ` Michal Wajdeczko
2021-07-23 22:29 ` Belgaumkar, Vinay
2021-07-21 20:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Enable GuC based power management features Patchwork
2021-07-21 20:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-21 20:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-22 1:37 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2021-07-28 21:11 [Intel-gfx] [PATCH v4 00/14] drm/i915/guc/slpc: " Vinay Belgaumkar
2021-07-28 21:11 ` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-29 16:33 ` Michal Wajdeczko
2021-07-30 2:00 [Intel-gfx] [PATCH v5 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-30 2:01 ` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-30 20:21 [Intel-gfx] [PATCH v6 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-30 20:21 ` [Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
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