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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Deak, Imre" <imre.deak@intel.com>
Subject: Re: [PATCH] drm/i915: Sanitize PHY state during display core uninit
Date: Mon, 19 Aug 2019 21:43:25 +0000	[thread overview]
Message-ID: <be0b669361724aba423ba209c87980b6e5ecff3f.camel@intel.com> (raw)
In-Reply-To: <20190816095523.15800-1-imre.deak@intel.com>

On Fri, 2019-08-16 at 12:55 +0300, Imre Deak wrote:
> To work around a DMC/Punit issue on ICL where the driver's
> ICL_PORT_COMP_DW8/IREFGEN PHY setting is lost when entering/exiting
> DC6
> state, make sure to reinit the PHY whenever disabling DC states.
> Similarly the driver's PHY/DBUF/CDCLK settings should have been
> preserved
> across DC5/6 transitions, so check this on all platforms.
> 
> This gets rid of the following WARN during suspend:
> Combo PHY A HW state changed unexpectedly

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_power.c  | 17 +++++++++++--
> ----
>  1 file changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 374b75602141..5f2395585abc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -966,8 +966,7 @@ static void gen9_assert_dbuf_enabled(struct
> drm_i915_private *dev_priv)
>  	     "Unexpected DBuf power power state (0x%08x)\n", tmp);
>  }
>  
> -static void gen9_dc_off_power_well_enable(struct drm_i915_private
> *dev_priv,
> -					  struct i915_power_well
> *power_well)
> +static void gen9_disable_dc_states(struct drm_i915_private
> *dev_priv)
>  {
>  	struct intel_cdclk_state cdclk_state = {};
>  
> @@ -991,6 +990,12 @@ static void gen9_dc_off_power_well_enable(struct
> drm_i915_private *dev_priv,
>  		intel_combo_phy_init(dev_priv);
>  }
>  
> +static void gen9_dc_off_power_well_enable(struct drm_i915_private
> *dev_priv,
> +					  struct i915_power_well
> *power_well)
> +{
> +	gen9_disable_dc_states(dev_priv);
> +}
> +
>  static void gen9_dc_off_power_well_disable(struct drm_i915_private
> *dev_priv,
>  					   struct i915_power_well
> *power_well)
>  {
> @@ -4521,7 +4526,7 @@ static void skl_display_core_uninit(struct
> drm_i915_private *dev_priv)
>  	struct i915_power_domains *power_domains = &dev_priv-
> >power_domains;
>  	struct i915_power_well *well;
>  
> -	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> +	gen9_disable_dc_states(dev_priv);
>  
>  	gen9_dbuf_disable(dev_priv);
>  
> @@ -4582,7 +4587,7 @@ static void bxt_display_core_uninit(struct
> drm_i915_private *dev_priv)
>  	struct i915_power_domains *power_domains = &dev_priv-
> >power_domains;
>  	struct i915_power_well *well;
>  
> -	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> +	gen9_disable_dc_states(dev_priv);
>  
>  	gen9_dbuf_disable(dev_priv);
>  
> @@ -4642,7 +4647,7 @@ static void cnl_display_core_uninit(struct
> drm_i915_private *dev_priv)
>  	struct i915_power_domains *power_domains = &dev_priv-
> >power_domains;
>  	struct i915_power_well *well;
>  
> -	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> +	gen9_disable_dc_states(dev_priv);
>  
>  	/* 1. Disable all display engine functions -> aready done */
>  
> @@ -4709,7 +4714,7 @@ static void icl_display_core_uninit(struct
> drm_i915_private *dev_priv)
>  	struct i915_power_domains *power_domains = &dev_priv-
> >power_domains;
>  	struct i915_power_well *well;
>  
> -	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> +	gen9_disable_dc_states(dev_priv);
>  
>  	/* 1. Disable all display engine functions -> aready done */
>  
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      parent reply	other threads:[~2019-08-19 21:43 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-16  9:55 [PATCH] drm/i915: Sanitize PHY state during display core uninit Imre Deak
2019-08-16 13:23 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-08-17  2:58 ` ✓ Fi.CI.IGT: " Patchwork
2019-08-20 13:21   ` Imre Deak
2019-08-19 21:43 ` Souza, Jose [this message]

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