From: shuang.he@intel.com
To: shuang.he@intel.com, intel-gfx@lists.freedesktop.org,
david.s.gordon@intel.com
Subject: Re: [PATCH 2/2] drm/i915: Track nested calls to intel(_logical)_ring_{begin, advance}
Date: 10 Dec 2014 14:46:42 -0800 [thread overview]
Message-ID: <bf3aaa$iubh15@fmsmga001.fm.intel.com> (raw)
In-Reply-To: <1418224029-20055-3-git-send-email-david.s.gordon@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -2 364/364 362/364
ILK -11 364/366 353/366
SNB -13 448/450 435/450
IVB -11 497/498 486/498
BYT -5 289/289 284/289
HSW -10 563/564 553/564
BDW -7 417/417 410/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gem_ringfill_blitter PASS(3, M23M25) DMESG_WARN(1, M25)
*PNV igt_gem_ringfill_blitter-interruptible PASS(3, M23M25) DMESG_WARN(1, M25)
*ILK igt_gem_concurrent_blit_gpu-bcs-gpu-read-after-write-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_concurrent_blit_gpu-bcs-overwrite-source-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_concurrent_blit_gpuX-bcs-gpu-read-after-write-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_concurrent_blit_gpuX-bcs-overwrite-source-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_concurrent_blit_prw-bcs-gpu-read-after-write-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_nonexisting-fb DMESG_WARN(1, M26)PASS(4, M26) NSPT(1, M26)
*ILK igt_gem_concurrent_blit_gtt-bcs-gpu-read-after-write-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_concurrent_blit_gttX-bcs-gpu-read-after-write-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_ringfill_blitter PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_gem_ringfill_blitter-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_bcs-flip-vs-modeset-interruptible PASS(5, M26) DMESG_WARN(1, M26)
*SNB igt_gem_concurrent_blit_cpu-rcs-gpu-read-after-write-interruptible PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_gpu-rcs-gpu-read-after-write-forked PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_gpu-rcs-gpu-read-after-write-interruptible PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_gpuX-rcs-gpu-read-after-write-forked PASS(2, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_gpuX-rcs-gpu-read-after-write-interruptible PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_prw-rcs-gpu-read-after-write-forked PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_prw-rcs-gpu-read-after-write-interruptible PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_ring_sync_copy_sync-render-blitter-read-write PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_ring_sync_copy_sync-render-blitter-write-read PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_ring_sync_copy_sync-render-blitter-write-write PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_userptr_blits_coherency-sync PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_pm_rps_min-max-config-loaded PASS(3, M35M22) DMESG_WARN(1, M22)
*SNB igt_gem_concurrent_blit_gtt-rcs-gpu-read-after-write-interruptible PASS(3, M35M22) DMESG_WARN(1, M22)
*IVB igt_gem_linear_blits_interruptible PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_linear_blits_normal PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_render_linear_blits PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_render_tiled_blits PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_tiled_blits_interruptible PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_tiled_blits_normal PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_tiled_fence_blits PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_userptr_blits_coherency-sync PASS(2, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_userptr_blits_coherency-unsync PASS(2, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_ringfill_blitter PASS(3, M4M34) DMESG_WARN(1, M34)
*IVB igt_gem_ringfill_blitter-interruptible PASS(3, M4M34) DMESG_WARN(1, M34)
*BYT igt_gem_gtt_hog PASS(3, M48M51) DMESG_WARN(1, M51)
*BYT igt_gem_ringfill_blitter PASS(3, M48M51) DMESG_WARN(1, M51)
*BYT igt_gem_ringfill_blitter-interruptible PASS(3, M48M51) DMESG_WARN(1, M51)
*BYT igt_gem_ringfill_render PASS(3, M48M51) DMESG_WARN(1, M51)
*BYT igt_gem_ringfill_render-interruptible PASS(3, M48M51) DMESG_WARN(1, M51)
*HSW igt_gem_linear_blits_interruptible PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_linear_blits_normal PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_render_linear_blits PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_render_tiled_blits PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_tiled_blits_interruptible PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_tiled_blits_normal PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_tiled_fence_blits PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_pm_rps_min-max-config-loaded PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_ringfill_blitter PASS(3, M40M20) DMESG_WARN(1, M40)
*HSW igt_gem_ringfill_blitter-interruptible PASS(3, M40M20) DMESG_WARN(1, M40)
*BDW igt_gem_render_linear_blits TIMEOUT(1, M30)PASS(3, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_render_tiled_blits TIMEOUT(1, M30)PASS(3, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_gtt_hog PASS(3, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_ringfill_blitter PASS(3, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_ringfill_blitter-interruptible PASS(3, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_ringfill_render PASS(3, M30M28) DMESG_WARN(1, M28)
*BDW igt_gem_ringfill_render-interruptible PASS(3, M30M28) DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-12-10 22:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-10 15:07 [PATCH 0/2] Track calls to intel(_logical)_ring_{begin, advance} Dave Gordon
2014-12-10 15:07 ` [PATCH 1/2] drm/i915: Track & check " Dave Gordon
2014-12-10 15:44 ` Daniel Vetter
2014-12-10 15:07 ` [PATCH 2/2] drm/i915: Track nested " Dave Gordon
2014-12-10 22:46 ` shuang.he [this message]
2014-12-10 16:12 ` [PATCH v2 0/2] Track " Dave Gordon
2014-12-10 16:12 ` [PATCH v2 1/2] drm/i915: Track & check " Dave Gordon
2014-12-10 16:12 ` [PATCH v2 2/2] drm/i915: Track nested " Dave Gordon
2014-12-11 0:30 ` shuang.he
2014-12-10 16:23 ` [PATCH 0/2] Track " Chris Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='bf3aaa$iubh15@fmsmga001.fm.intel.com' \
--to=shuang.he@intel.com \
--cc=david.s.gordon@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox