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From: Luca Coelho <luca@coelho.fi>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	 dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 08/11] drm/i915: Introduce crtc_state->enhanced_framing
Date: Thu, 25 May 2023 12:51:28 +0300	[thread overview]
Message-ID: <c11fcc5b7920363e885826d31a4fd01e4dbb00a5.camel@coelho.fi> (raw)
In-Reply-To: <20230503113659.16305-1-ville.syrjala@linux.intel.com>

On Wed, 2023-05-03 at 14:36 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Track DP enhanced framing properly in the crtc state instead
> of relying just on the cached DPCD everywhere, and hook it
> up into the state check and dump.
> 
> v2: Actually set enhanced_framing in .compute_config()
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/g4x_dp.c                 | 10 ++++++++--
>  drivers/gpu/drm/i915/display/intel_crt.c              |  2 ++
>  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c  |  5 +++--
>  drivers/gpu/drm/i915/display/intel_ddi.c              | 11 +++++++++--
>  drivers/gpu/drm/i915/display/intel_display.c          |  1 +
>  drivers/gpu/drm/i915/display/intel_display_types.h    |  2 ++
>  drivers/gpu/drm/i915/display/intel_dp.c               |  3 +++
>  drivers/gpu/drm/i915/display/intel_dp_link_training.c |  2 +-
>  8 files changed, 29 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 920d570f7594..534546ea7d0b 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -141,7 +141,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
>  
>  		intel_de_rmw(dev_priv, TRANS_DP_CTL(crtc->pipe),
>  			     TRANS_DP_ENH_FRAMING,
> -			     drm_dp_enhanced_frame_cap(intel_dp->dpcd) ?
> +			     pipe_config->enhanced_framing ?
>  			     TRANS_DP_ENH_FRAMING : 0);
>  	} else {
>  		if (IS_G4X(dev_priv) && pipe_config->limited_color_range)
> @@ -153,7 +153,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
>  			intel_dp->DP |= DP_SYNC_VS_HIGH;
>  		intel_dp->DP |= DP_LINK_TRAIN_OFF;
>  
> -		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
> +		if (pipe_config->enhanced_framing)
>  			intel_dp->DP |= DP_ENHANCED_FRAMING;
>  
>  		if (IS_CHERRYVIEW(dev_priv))
> @@ -351,6 +351,9 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
>  		u32 trans_dp = intel_de_read(dev_priv,
>  					     TRANS_DP_CTL(crtc->pipe));
>  
> +		if (trans_dp & TRANS_DP_ENH_FRAMING)
> +			pipe_config->enhanced_framing = true;
> +
>  		if (trans_dp & TRANS_DP_HSYNC_ACTIVE_HIGH)
>  			flags |= DRM_MODE_FLAG_PHSYNC;
>  		else
> @@ -361,6 +364,9 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
>  		else
>  			flags |= DRM_MODE_FLAG_NVSYNC;
>  	} else {
> +		if (tmp & DP_ENHANCED_FRAMING)
> +			pipe_config->enhanced_framing = true;
> +
>  		if (tmp & DP_SYNC_HS_HIGH)
>  			flags |= DRM_MODE_FLAG_PHSYNC;
>  		else
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 13519f78cf9f..52af64aa9953 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -449,6 +449,8 @@ static int hsw_crt_compute_config(struct intel_encoder *encoder,
>  	/* FDI must always be 2.7 GHz */
>  	pipe_config->port_clock = 135000 * 2;
>  
> +	pipe_config->enhanced_framing = true;
> +

Just curious, why are you setting it to true by default here?

Otherwise, the changes look reasonable:

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

  reply	other threads:[~2023-05-25  9:51 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-02 14:38 [Intel-gfx] [PATCH 00/11] drm/i915: MST+DSC nukage and state stuff Ville Syrjala
2023-05-02 14:38 ` [Intel-gfx] [PATCH 01/11] drm/dp_mst: Fix fractional DSC bpp handling Ville Syrjala
2023-05-03 20:37   ` Lyude Paul
2023-05-02 14:38 ` [Intel-gfx] [PATCH 02/11] drm/i915/mst: Remove broken MST DSC support Ville Syrjala
2023-05-03  7:17   ` Lisovskiy, Stanislav
2023-05-03  7:36   ` Lisovskiy, Stanislav
2023-05-03 11:07     ` Ville Syrjälä
2023-05-03 12:23       ` Lisovskiy, Stanislav
2023-06-15 22:11         ` Dave Airlie
2023-05-02 14:38 ` [Intel-gfx] [PATCH 03/11] drm/i915/mst: Read out FEC state Ville Syrjala
2023-05-25  7:56   ` Luca Coelho
2023-05-02 14:38 ` [Intel-gfx] [PATCH 04/11] drm/i915: Fix FEC pipe A vs. DDI A mixup Ville Syrjala
2023-05-25  8:00   ` Luca Coelho
2023-05-02 14:39 ` [Intel-gfx] [PATCH 05/11] drm/i915: Check lane count when determining FEC support Ville Syrjala
2023-05-25  8:09   ` Luca Coelho
2023-09-13 14:41     ` Ville Syrjälä
2023-05-02 14:39 ` [Intel-gfx] [PATCH 06/11] drm/i915: Fix FEC state dump Ville Syrjala
2023-05-25  8:37   ` Luca Coelho
2023-05-02 14:39 ` [Intel-gfx] [PATCH 07/11] drm/i915: Split some long lines Ville Syrjala
2023-05-25  8:40   ` Luca Coelho
2023-05-02 14:39 ` [Intel-gfx] [PATCH 08/11] drm/i915: Introduce crtc_state->enhanced_framing Ville Syrjala
2023-05-03 11:36   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-05-25  9:51     ` Luca Coelho [this message]
2023-09-13 14:36       ` Ville Syrjälä
2023-05-02 14:39 ` [Intel-gfx] [PATCH 09/11] drm/i915: Stop spamming the logs with PLL state Ville Syrjala
2023-05-25  9:52   ` Luca Coelho
2023-05-02 14:39 ` [Intel-gfx] [PATCH 10/11] drm/i915: Drop some redundant eDP checks Ville Syrjala
2023-05-25  9:54   ` Luca Coelho
2023-05-02 14:39 ` [Intel-gfx] [PATCH 11/11] drm/i915: Reduce combo PHY log spam Ville Syrjala
2023-05-25  9:58   ` Luca Coelho
2023-05-02 15:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: MST+DSC nukage and state stuff Patchwork
2023-05-02 15:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-02 15:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-02 17:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: MST+DSC nukage and state stuff (rev2) Patchwork
2023-05-02 17:44 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-02 18:04 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-03 12:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: MST+DSC nukage and state stuff (rev3) Patchwork
2023-05-03 12:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-03 13:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-03 17:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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