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From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 3/5] drm/i915/display: Workaround cursor left overs with PSR2 selective fetch enabled
Date: Fri, 17 Sep 2021 17:02:21 +0000	[thread overview]
Message-ID: <c347299ba2b7bdcb2de79ee60569977058aeb51a.camel@intel.com> (raw)
In-Reply-To: <YUSSbMQKuQxQ7Ug9@intel.com>

On Fri, 2021-09-17 at 16:04 +0300, Ville Syrjälä wrote:
> On Thu, Sep 16, 2021 at 05:09:08PM +0000, Souza, Jose wrote:
> > On Thu, 2021-09-16 at 16:17 +0300, Ville Syrjälä wrote:
> > > On Wed, Sep 15, 2021 at 06:18:35PM +0000, Souza, Jose wrote:
> > > > On Wed, 2021-09-15 at 17:58 +0300, Ville Syrjälä wrote:
> > > > > On Tue, Sep 14, 2021 at 02:25:05PM -0700, José Roberto de Souza wrote:
> > > > > > Not sure why but when moving the cursor fast it causes some artifacts
> > > > > > of the cursor to be left in the cursor path, adding some pixels above
> > > > > > the cursor to the damaged area fixes the issue, so leaving this as a
> > > > > > workaround until proper fix is found.
> > > > > 
> > > > > Have you tried warping the cursor clear across the screen while
> > > > > a partial update is already pending? I think it will go badly.
> > > > 
> > > > You mean move the cursor for example from 0x0 to 500x500 in one frame?
> > > > It will mark as damaged the previous area and the new one.
> > > 
> > > Legacy cursor updates bypass all that stuff so you're not going to
> > > updating the sel fetch area for the other planes.
> > > 
> > > > 
> > > > > 
> > > > > In fact I'm thinking the mailbox style legacy cursor updates are just
> > > > > fundementally incompatible with partial updates since the cursor
> > > > > can move outside of the already committed update region any time.
> > > > > Ie. I suspect while the cursor is visible we simply can't do partial
> > > > > updates.
> > > > 
> > > > Probably I did not understand what you want to say, but each cursor update will be in one frame, updating the necessary area.
> > > 
> > > The legacy cursor uses mailbox updates so there is no 1:1 relationship
> > > between actual scanned out frames and cursor ioctl calls. You can
> > > have umpteen thousand cursor updates per frame.
> > 
> > Not if intel_legacy_cursor_update() is changed to go to the slow path and do one atomic commit for each move.
> > https://patchwork.freedesktop.org/patch/453192/?series=94522&rev=1
> 
> That's not going to fly. The whole reason for the legacy cursor thing is
> that X likes to do thousands of cursor updates per frame.

From user experience perspective there is no issues in converting to atomic commit, those 3 videos that I shared with you have this conversion. 

> 
> > 
> > I believe compositors will do a single atomic commit updating cursor and all the other planes into a single commit.
> 
> No. X obviously doesn't do that. And IIRC chromeos also uses the
> legacy cursor ioctl for the cursor despite using atomic commits for
> everything else.
> 


  reply	other threads:[~2021-09-17 17:02 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-14 21:25 [Intel-gfx] [PATCH v2 1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation José Roberto de Souza
2021-09-14 21:25 ` [Intel-gfx] [PATCH v2 2/5] drm/i915/display: Wait at least 2 frames before selective update José Roberto de Souza
2021-09-14 21:25 ` [Intel-gfx] [PATCH v2 3/5] drm/i915/display: Workaround cursor left overs with PSR2 selective fetch enabled José Roberto de Souza
2021-09-15 14:58   ` Ville Syrjälä
2021-09-15 18:18     ` Souza, Jose
2021-09-16 13:17       ` Ville Syrjälä
2021-09-16 17:09         ` Souza, Jose
2021-09-17 13:04           ` Ville Syrjälä
2021-09-17 17:02             ` Souza, Jose [this message]
2021-09-17 17:49               ` Ville Syrjälä
2021-09-17 21:33                 ` Souza, Jose
2021-09-21 13:35                   ` Ville Syrjälä
2021-09-21 22:37                     ` Souza, Jose
2021-09-22 13:41                       ` Ville Syrjälä
2021-09-22 15:51                         ` Souza, Jose
2021-09-14 21:25 ` [Intel-gfx] [PATCH v2 4/5] drm/i915/display/psr: Use drm damage helpers to calculate plane damaged area José Roberto de Souza
2021-09-14 21:25 ` [Intel-gfx] [PATCH v2 5/5] drm/i915/display/adlp: Add new PSR2 workarounds José Roberto de Souza
2021-09-15 14:20   ` Gwan-gyeong Mun
2021-09-14 22:26 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation Patchwork
2021-09-15 19:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation (rev2) Patchwork
2021-09-15 20:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation (rev3) Patchwork
2021-09-16 22:31 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation (rev4) Patchwork
2021-09-17  0:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation (rev5) Patchwork
2021-09-17  4:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-17 17:52   ` Souza, Jose

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