From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>, <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/3] drm/i915/guc/slpc: Print more SLPC debug status information
Date: Wed, 8 Jan 2025 11:08:09 -0800 [thread overview]
Message-ID: <c355cf38-4caf-4d97-9d4d-ae7304481d2e@intel.com> (raw)
In-Reply-To: <20250108141318.63823-4-rodrigo.vivi@intel.com>
On 1/8/2025 6:13 AM, Rodrigo Vivi wrote:
> Let's peak on the Balancer and DCC status, now that we
> are using the default strategies.
s/peak/peek
>
> v2: fix identation
>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 722da8a7f852..7a9a79fb46fb 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -774,6 +774,23 @@ int intel_guc_slpc_print_info(struct intel_guc_slpc *slpc, struct drm_printer *p
> drm_printf(p, "\tSLPC state: %s\n", slpc_get_state_string(slpc));
> drm_printf(p, "\tGTPERF task active: %s\n",
> str_yes_no(slpc_tasks->status & SLPC_GTPERF_TASK_ENABLED));
> + drm_printf(p, "\tDCC enabled: %s\n",
> + str_yes_no(slpc_tasks->status &
> + SLPC_DCC_TASK_ENABLED));
> + drm_printf(p, "\tDCC in: %s\n",
> + str_yes_no(slpc_tasks->status & SLPC_IN_DCC));
> + drm_printf(p, "\tBalancer enabled: %s\n",
> + str_yes_no(slpc_tasks->status &
> + SLPC_BALANCER_ENABLED));
> + drm_printf(p, "\tIBC enabled: %s\n",
> + str_yes_no(slpc_tasks->status &
> + SLPC_IBC_TASK_ENABLED));
> + drm_printf(p, "\tBalancer IA LMT enabled: %s\n",
> + str_yes_no(slpc_tasks->status &
> + SLPC_BALANCER_IA_LMT_ENABLED));
> + drm_printf(p, "\tBalancer IA LMT active: %s\n",
> + str_yes_no(slpc_tasks->status &
> + SLPC_BALANCER_IA_LMT_ACTIVE));
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> drm_printf(p, "\tMax freq: %u MHz\n",
> slpc_decode_max_freq(slpc));
> drm_printf(p, "\tMin freq: %u MHz\n",
next prev parent reply other threads:[~2025-01-08 19:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-08 14:13 [PATCH 0/3] Enable GuC SLPC default balancing strategies v2 Rodrigo Vivi
2025-01-08 14:13 ` [PATCH 1/3] drm/i915: Increase the timeout of the spinners Rodrigo Vivi
2025-01-08 14:13 ` [PATCH 2/3] drm/i915/guc/slpc: Enable GuC SLPC default strategies Rodrigo Vivi
2025-01-08 19:11 ` Belgaumkar, Vinay
2025-01-08 19:30 ` Dixit, Ashutosh
2025-01-08 21:19 ` Rodrigo Vivi
2025-01-09 5:18 ` Dixit, Ashutosh
2025-01-09 19:00 ` Rodrigo Vivi
2025-01-09 21:32 ` Dixit, Ashutosh
2025-01-08 14:13 ` [PATCH 3/3] drm/i915/guc/slpc: Print more SLPC debug status information Rodrigo Vivi
2025-01-08 19:08 ` Belgaumkar, Vinay [this message]
2025-01-08 16:10 ` ✓ i915.CI.BAT: success for Enable GuC SLPC default balancing strategies (rev3) Patchwork
2025-01-09 18:06 ` ✓ i915.CI.Full: " Patchwork
2025-01-09 22:28 ` [PATCH 0/3] Enable GuC SLPC default balancing strategies v2 Rodrigo Vivi
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