From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: maarten.lankhorst@intel.com
Subject: Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/hdcp: Add DP HDCP2.2 timeout to read entire msg
Date: Thu, 25 Mar 2021 12:21:52 +0530 [thread overview]
Message-ID: <c9d95f02-3a2b-4a01-6b19-2ce3c051ec9d@intel.com> (raw)
In-Reply-To: <20210324113012.7564-2-anshuman.gupta@intel.com>
LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
On 3/24/2021 5:00 PM, Anshuman Gupta wrote:
> As documented in HDCP 2.2 DP Errata spec transmitter should abort the
> authentication protocol in case transmitter has not received the
> entire {AKE_Send_Cert, AKE_Send_H_prime, AKE_Send_Paring_Info} msg
> within {110,7,5} miliseconds.
>
> Adding above msg timeout values and aborting the HDCP authentication
> in case it timedout to read entire msg.
>
> https://www.digital-cp.com/sites/default/files/HDCP%202_2_DisplayPort_Errata_v3_0.pdf
>
> v2:
> - Removed redundant variable msg_can_timedout. [Ankit]
>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 45 ++++++++++++++------
> include/drm/drm_hdcp.h | 3 ++
> 2 files changed, 35 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 40c516e90193..8bad4b3d34dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -294,37 +294,39 @@ struct hdcp2_dp_msg_data {
> bool msg_detectable;
> u32 timeout;
> u32 timeout2; /* Added for non_paired situation */
> + /* Timeout to read entire msg */
> + u32 msg_read_timeout;
> };
>
> static const struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
> - { HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
> + { HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0, 0},
> { HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
> - false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
> + false, HDCP_2_2_CERT_TIMEOUT_MS, 0, HDCP_2_2_DP_CERT_READ_TIMEOUT_MS},
> { HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
> - false, 0, 0 },
> + false, 0, 0, 0 },
> { HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
> - false, 0, 0 },
> + false, 0, 0, 0 },
> { HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
> true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> - HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
> + HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS, HDCP_2_2_DP_HPRIME_READ_TIMEOUT_MS},
> { HDCP_2_2_AKE_SEND_PAIRING_INFO,
> DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
> - HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
> - { HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
> + HDCP_2_2_PAIRING_TIMEOUT_MS, 0, HDCP_2_2_DP_PAIRING_READ_TIMEOUT_MS },
> + { HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0, 0 },
> { HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
> - false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
> + false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0, 0 },
> { HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
> - 0, 0 },
> + 0, 0, 0 },
> { HDCP_2_2_REP_SEND_RECVID_LIST,
> DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
> - HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
> + HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0, 0 },
> { HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
> - 0, 0 },
> + 0, 0, 0 },
> { HDCP_2_2_REP_STREAM_MANAGE,
> DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
> - 0, 0 },
> + 0, 0, 0},
> { HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
> - false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
> + false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0, 0 },
> /* local define to shovel this through the write_2_2 interface */
> #define HDCP_2_2_ERRATA_DP_STREAM_TYPE 50
> { HDCP_2_2_ERRATA_DP_STREAM_TYPE,
> @@ -513,6 +515,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
> u8 *byte = buf;
> ssize_t ret, bytes_to_recv, len;
> const struct hdcp2_dp_msg_data *hdcp2_msg_data;
> + ktime_t msg_end;
> + bool msg_expired;
>
> hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id);
> if (!hdcp2_msg_data)
> @@ -539,6 +543,11 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
> len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ?
> DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_recv;
>
> + /* Entire msg read timeout since initiate of msg read */
> + if (bytes_to_recv == size - 1 && hdcp2_msg_data->msg_read_timeout > 0)
> + msg_end = ktime_add_ms(ktime_get_raw(),
> + hdcp2_msg_data->msg_read_timeout);
> +
> ret = drm_dp_dpcd_read(&dig_port->dp.aux, offset,
> (void *)byte, len);
> if (ret < 0) {
> @@ -551,6 +560,16 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
> byte += ret;
> offset += ret;
> }
> +
> + if (hdcp2_msg_data->msg_read_timeout > 0) {
> + msg_expired = ktime_after(ktime_get_raw(), msg_end);
> + if (msg_expired) {
> + drm_dbg_kms(&i915->drm, "msg_id %d, entire msg read timeout(mSec): %d\n",
> + msg_id, hdcp2_msg_data->msg_read_timeout);
> + return -ETIMEDOUT;
> + }
> + }
> +
> byte = buf;
> *byte = msg_id;
>
> diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
> index ac22c246542a..2b165a0f434f 100644
> --- a/include/drm/drm_hdcp.h
> +++ b/include/drm/drm_hdcp.h
> @@ -224,9 +224,12 @@ struct hdcp2_rep_stream_ready {
>
> /* HDCP2.2 TIMEOUTs in mSec */
> #define HDCP_2_2_CERT_TIMEOUT_MS 100
> +#define HDCP_2_2_DP_CERT_READ_TIMEOUT_MS 110
> #define HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS 1000
> #define HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS 200
> +#define HDCP_2_2_DP_HPRIME_READ_TIMEOUT_MS 7
> #define HDCP_2_2_PAIRING_TIMEOUT_MS 200
> +#define HDCP_2_2_DP_PAIRING_READ_TIMEOUT_MS 5
> #define HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS 20
> #define HDCP_2_2_DP_LPRIME_TIMEOUT_MS 7
> #define HDCP_2_2_RECVID_LIST_TIMEOUT_MS 3000
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-03-25 6:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-24 11:30 [Intel-gfx] [PATCH v2 0/2] HDCP 2.2 DP errata Anshuman Gupta
2021-03-24 11:30 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/hdcp: Add DP HDCP2.2 timeout to read entire msg Anshuman Gupta
2021-03-25 6:51 ` Nautiyal, Ankit K [this message]
2021-03-31 11:38 ` Jani Nikula
2021-03-24 11:30 ` [Intel-gfx] [PATCH v2 2/2] drm/hdcp: DP HDCP2.2 errata LC_Send_L_Prime=16 Anshuman Gupta
2021-03-24 12:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 DP errata (rev2) Patchwork
2021-03-24 12:13 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-03-24 12:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-24 22:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-03-25 13:39 ` [Intel-gfx] [PATCH v2 0/2] HDCP 2.2 DP errata Jani Nikula
2021-03-31 10:22 ` Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c9d95f02-3a2b-4a01-6b19-2ce3c051ec9d@intel.com \
--to=ankit.k.nautiyal@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=maarten.lankhorst@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox