From: John Harrison <John.C.Harrison@Intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 20/34] drm/i915: Introduce concept of per-timeline (context) HWSP
Date: Tue, 22 Jan 2019 17:35:35 -0800 [thread overview]
Message-ID: <cbb540f1-95c0-2ea2-73be-1e14579fc635@Intel.com> (raw)
In-Reply-To: <20190121222117.23305-21-chris@chris-wilson.co.uk>
On 1/21/2019 14:21, Chris Wilson wrote:
> Supplement the per-engine HWSP with a per-timeline HWSP. That is a
> per-request pointer through which we can check a local seqno,
> abstracting away the presumption of a global seqno. In this first step,
> we point each request back into the engine's HWSP so everything
> continues to work with the global timeline.
>
> v2: s/i915_request_hwsp/hwsp_seqno/ to emphasis that this is the current
> HW value and that we are accessing it via i915_request merely as a
> convenience.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_request.c | 16 ++++++----
> drivers/gpu/drm/i915/i915_request.h | 45 ++++++++++++++++++++++++-----
> drivers/gpu/drm/i915/intel_lrc.c | 9 ++++--
> 3 files changed, 55 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index 2721a356368f..d61e86c6a1d1 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -182,10 +182,11 @@ static void free_capture_list(struct i915_request *request)
> static void __retire_engine_request(struct intel_engine_cs *engine,
> struct i915_request *rq)
> {
> - GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d\n",
> + GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d:%d\n",
> __func__, engine->name,
> rq->fence.context, rq->fence.seqno,
> rq->global_seqno,
> + hwsp_seqno(rq),
> intel_engine_get_seqno(engine));
>
> GEM_BUG_ON(!i915_request_completed(rq));
> @@ -244,10 +245,11 @@ static void i915_request_retire(struct i915_request *request)
> {
> struct i915_gem_active *active, *next;
>
> - GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
> + GEM_TRACE("%s fence %llx:%lld, global=%d, current %d:%d\n",
> request->engine->name,
> request->fence.context, request->fence.seqno,
> request->global_seqno,
> + hwsp_seqno(request),
> intel_engine_get_seqno(request->engine));
>
> lockdep_assert_held(&request->i915->drm.struct_mutex);
> @@ -307,10 +309,11 @@ void i915_request_retire_upto(struct i915_request *rq)
> struct intel_ring *ring = rq->ring;
> struct i915_request *tmp;
>
> - GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
> + GEM_TRACE("%s fence %llx:%lld, global=%d, current %d:%d\n",
> rq->engine->name,
> rq->fence.context, rq->fence.seqno,
> rq->global_seqno,
> + hwsp_seqno(rq),
> intel_engine_get_seqno(rq->engine));
>
> lockdep_assert_held(&rq->i915->drm.struct_mutex);
> @@ -355,10 +358,11 @@ void __i915_request_submit(struct i915_request *request)
> struct intel_engine_cs *engine = request->engine;
> u32 seqno;
>
> - GEM_TRACE("%s fence %llx:%lld -> global=%d, current %d\n",
> + GEM_TRACE("%s fence %llx:%lld -> global=%d, current %d:%d\n",
> engine->name,
> request->fence.context, request->fence.seqno,
> engine->timeline.seqno + 1,
> + hwsp_seqno(request),
> intel_engine_get_seqno(engine));
>
> GEM_BUG_ON(!irqs_disabled());
> @@ -405,10 +409,11 @@ void __i915_request_unsubmit(struct i915_request *request)
> {
> struct intel_engine_cs *engine = request->engine;
>
> - GEM_TRACE("%s fence %llx:%lld <- global=%d, current %d\n",
> + GEM_TRACE("%s fence %llx:%lld <- global=%d, current %d:%d\n",
> engine->name,
> request->fence.context, request->fence.seqno,
> request->global_seqno,
> + hwsp_seqno(request),
> intel_engine_get_seqno(engine));
>
> GEM_BUG_ON(!irqs_disabled());
> @@ -616,6 +621,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
> rq->ring = ce->ring;
> rq->timeline = ce->ring->timeline;
> GEM_BUG_ON(rq->timeline == &engine->timeline);
> + rq->hwsp_seqno = &engine->status_page.addr[I915_GEM_HWS_INDEX];
>
> spin_lock_init(&rq->lock);
> dma_fence_init(&rq->fence,
> diff --git a/drivers/gpu/drm/i915/i915_request.h b/drivers/gpu/drm/i915/i915_request.h
> index c0f084ca4f29..ade010fe6e26 100644
> --- a/drivers/gpu/drm/i915/i915_request.h
> +++ b/drivers/gpu/drm/i915/i915_request.h
> @@ -130,6 +130,13 @@ struct i915_request {
> struct i915_sched_node sched;
> struct i915_dependency dep;
>
> + /*
> + * A convenience pointer to the current breadcrumb value stored in
> + * the HW status page (or our timeline's local equivalent). The full
> + * path would be rq->hw_context->ring->timeline->hwsp_seqno.
> + */
> + const u32 *hwsp_seqno;
> +
> /**
> * GEM sequence number associated with this request on the
> * global execution timeline. It is zero when the request is not
> @@ -285,11 +292,6 @@ static inline bool i915_request_signaled(const struct i915_request *rq)
> return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);
> }
>
> -static inline bool intel_engine_has_started(struct intel_engine_cs *engine,
> - u32 seqno);
> -static inline bool intel_engine_has_completed(struct intel_engine_cs *engine,
> - u32 seqno);
> -
> /**
> * Returns true if seq1 is later than seq2.
> */
> @@ -298,6 +300,35 @@ static inline bool i915_seqno_passed(u32 seq1, u32 seq2)
> return (s32)(seq1 - seq2) >= 0;
> }
>
> +static inline u32 __hwsp_seqno(const struct i915_request *rq)
> +{
> + return READ_ONCE(*rq->hwsp_seqno);
> +}
> +
> +/**
> + * hwsp_seqno - the current breadcrumb value in the HW status page
> + * @rq: the request, to chase the relevant HW status page
> + *
> + * The emphasis in naming here is that hwsp_seqno() is not a property of the
> + * request, but an indication of the current HW state (associated with this
> + * request). Its value will change as the GPU executes more requests.
> + *
> + * Returns the current breadcrumb value in the associated HW status page (or
> + * the local timeline's equivalent) for this request. The request itself
> + * has the associated breadcrumb value of rq->fence.seqno, when the HW
> + * status page has that breadcrumb or later, this request is complete.
> + */
> +static inline u32 hwsp_seqno(const struct i915_request *rq)
> +{
> + u32 seqno;
> +
> + rcu_read_lock(); /* the HWSP may be freed at runtime */
> + seqno = __hwsp_seqno(rq);
> + rcu_read_unlock();
> +
> + return seqno;
> +}
> +
Much better name and good comments too :).
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> /**
> * i915_request_started - check if the request has begun being executed
> * @rq: the request
> @@ -315,14 +346,14 @@ static inline bool i915_request_started(const struct i915_request *rq)
> if (!seqno) /* not yet submitted to HW */
> return false;
>
> - return intel_engine_has_started(rq->engine, seqno);
> + return i915_seqno_passed(hwsp_seqno(rq), seqno - 1);
> }
>
> static inline bool
> __i915_request_completed(const struct i915_request *rq, u32 seqno)
> {
> GEM_BUG_ON(!seqno);
> - return intel_engine_has_completed(rq->engine, seqno) &&
> + return i915_seqno_passed(hwsp_seqno(rq), seqno) &&
> seqno == i915_request_global_seqno(rq);
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 464dd309fa99..e45c4e29c435 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -470,11 +470,12 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
> desc = execlists_update_context(rq);
> GEM_DEBUG_EXEC(port[n].context_id = upper_32_bits(desc));
>
> - GEM_TRACE("%s in[%d]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d), prio=%d\n",
> + GEM_TRACE("%s in[%d]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d:%d), prio=%d\n",
> engine->name, n,
> port[n].context_id, count,
> rq->global_seqno,
> rq->fence.context, rq->fence.seqno,
> + hwsp_seqno(rq),
> intel_engine_get_seqno(engine),
> rq_prio(rq));
> } else {
> @@ -767,11 +768,12 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
> while (num_ports-- && port_isset(port)) {
> struct i915_request *rq = port_request(port);
>
> - GEM_TRACE("%s:port%u global=%d (fence %llx:%lld), (current %d)\n",
> + GEM_TRACE("%s:port%u global=%d (fence %llx:%lld), (current %d:%d)\n",
> rq->engine->name,
> (unsigned int)(port - execlists->port),
> rq->global_seqno,
> rq->fence.context, rq->fence.seqno,
> + hwsp_seqno(rq),
> intel_engine_get_seqno(rq->engine));
>
> GEM_BUG_ON(!execlists->active);
> @@ -997,12 +999,13 @@ static void process_csb(struct intel_engine_cs *engine)
> EXECLISTS_ACTIVE_USER));
>
> rq = port_unpack(port, &count);
> - GEM_TRACE("%s out[0]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d), prio=%d\n",
> + GEM_TRACE("%s out[0]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d:%d), prio=%d\n",
> engine->name,
> port->context_id, count,
> rq ? rq->global_seqno : 0,
> rq ? rq->fence.context : 0,
> rq ? rq->fence.seqno : 0,
> + rq ? hwsp_seqno(rq) : 0,
> intel_engine_get_seqno(engine),
> rq ? rq_prio(rq) : 0);
>
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next prev parent reply other threads:[~2019-01-23 1:35 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-21 22:20 HWSP for HW semaphores Chris Wilson
2019-01-21 22:20 ` [PATCH 01/34] drm/i915/execlists: Mark up priority boost on preemption Chris Wilson
2019-01-21 22:20 ` [PATCH 02/34] drm/i915/execlists: Suppress preempting self Chris Wilson
2019-01-22 22:18 ` John Harrison
2019-01-22 22:38 ` Chris Wilson
2019-01-21 22:20 ` [PATCH 03/34] drm/i915: Show all active engines on hangcheck Chris Wilson
2019-01-22 12:33 ` Mika Kuoppala
2019-01-22 12:42 ` Chris Wilson
2019-01-21 22:20 ` [PATCH 04/34] drm/i915/selftests: Refactor common live_test framework Chris Wilson
2019-01-22 12:37 ` Matthew Auld
2019-01-21 22:20 ` [PATCH 05/34] drm/i915/selftests: Track evict objects explicitly Chris Wilson
2019-01-22 11:53 ` Matthew Auld
2019-01-21 22:20 ` [PATCH 06/34] drm/i915/selftests: Create a clean GGTT for vma/gtt selftesting Chris Wilson
2019-01-22 12:07 ` Matthew Auld
2019-01-21 22:20 ` [PATCH 07/34] drm/i915: Refactor out intel_context_init() Chris Wilson
2019-01-22 12:32 ` Matthew Auld
2019-01-22 12:39 ` Mika Kuoppala
2019-01-22 12:48 ` Chris Wilson
2019-01-21 22:20 ` [PATCH 08/34] drm/i915: Make all GPU resets atomic Chris Wilson
2019-01-22 22:19 ` John Harrison
2019-01-22 22:27 ` Chris Wilson
2019-01-23 8:52 ` Mika Kuoppala
2019-01-21 22:20 ` [PATCH 09/34] drm/i915/guc: Disable global reset Chris Wilson
2019-01-22 22:23 ` John Harrison
2019-01-21 22:20 ` [PATCH 10/34] drm/i915: Remove GPU reset dependence on struct_mutex Chris Wilson
2019-01-24 12:06 ` Mika Kuoppala
2019-01-24 12:50 ` Chris Wilson
2019-01-24 13:12 ` Chris Wilson
2019-01-24 14:10 ` Chris Wilson
2019-01-21 22:20 ` [PATCH 11/34] drm/i915/selftests: Trim struct_mutex duration for set-wedged selftest Chris Wilson
2019-01-21 22:20 ` [PATCH 12/34] drm/i915: Issue engine resets onto idle engines Chris Wilson
2019-01-23 1:18 ` John Harrison
2019-01-23 1:31 ` Chris Wilson
2019-01-21 22:20 ` [PATCH 13/34] drm/i915: Stop tracking MRU activity on VMA Chris Wilson
2019-01-21 22:20 ` [PATCH 14/34] drm/i915: Pull VM lists under the VM mutex Chris Wilson
2019-01-22 9:09 ` Tvrtko Ursulin
2019-01-21 22:20 ` [PATCH 15/34] drm/i915: Move vma lookup to its own lock Chris Wilson
2019-01-21 22:20 ` [PATCH 16/34] drm/i915: Always allocate an object/vma for the HWSP Chris Wilson
2019-01-21 22:21 ` [PATCH 17/34] drm/i915: Move list of timelines under its own lock Chris Wilson
2019-01-21 22:21 ` [PATCH 18/34] drm/i915/selftests: Use common mock_engine::advance Chris Wilson
2019-01-22 9:33 ` Tvrtko Ursulin
2019-01-21 22:21 ` [PATCH 19/34] drm/i915: Tidy common test_bit probing of i915_request->fence.flags Chris Wilson
2019-01-22 9:35 ` Tvrtko Ursulin
2019-01-21 22:21 ` [PATCH 20/34] drm/i915: Introduce concept of per-timeline (context) HWSP Chris Wilson
2019-01-23 1:35 ` John Harrison [this message]
2019-01-21 22:21 ` [PATCH 21/34] drm/i915: Enlarge vma->pin_count Chris Wilson
2019-01-21 22:21 ` [PATCH 22/34] drm/i915: Allocate a status page for each timeline Chris Wilson
2019-01-21 22:21 ` [PATCH 23/34] drm/i915: Share per-timeline HWSP using a slab suballocator Chris Wilson
2019-01-22 10:47 ` Tvrtko Ursulin
2019-01-22 11:12 ` Chris Wilson
2019-01-22 11:33 ` Tvrtko Ursulin
2019-01-21 22:21 ` [PATCH 24/34] drm/i915: Track the context's seqno in its own timeline HWSP Chris Wilson
2019-01-22 12:24 ` Tvrtko Ursulin
2019-01-21 22:21 ` [PATCH 25/34] drm/i915: Track active timelines Chris Wilson
2019-01-22 14:56 ` Tvrtko Ursulin
2019-01-22 15:17 ` Chris Wilson
2019-01-23 22:32 ` John Harrison
2019-01-23 23:08 ` Chris Wilson
2019-01-21 22:21 ` [PATCH 26/34] drm/i915: Identify active requests Chris Wilson
2019-01-22 15:34 ` Tvrtko Ursulin
2019-01-22 15:45 ` Chris Wilson
2019-01-21 22:21 ` [PATCH 27/34] drm/i915: Remove the intel_engine_notify tracepoint Chris Wilson
2019-01-22 15:50 ` Tvrtko Ursulin
2019-01-23 12:54 ` Chris Wilson
2019-01-23 13:18 ` Tvrtko Ursulin
2019-01-23 13:24 ` Chris Wilson
2019-01-21 22:21 ` [PATCH 28/34] drm/i915: Replace global breadcrumbs with per-context interrupt tracking Chris Wilson
2019-01-23 9:21 ` Tvrtko Ursulin
2019-01-23 10:01 ` Chris Wilson
2019-01-23 16:28 ` Tvrtko Ursulin
2019-01-23 11:41 ` [PATCH] " Chris Wilson
2019-01-21 22:21 ` [PATCH 29/34] drm/i915: Drop fake breadcrumb irq Chris Wilson
2019-01-24 17:55 ` Tvrtko Ursulin
2019-01-24 18:18 ` Chris Wilson
2019-01-21 22:21 ` [PATCH 30/34] drm/i915: Keep timeline HWSP allocated until the system is idle Chris Wilson
2019-01-21 22:37 ` Chris Wilson
2019-01-21 22:48 ` Chris Wilson
2019-01-21 22:21 ` [PATCH 31/34] drm/i915/execlists: Refactor out can_merge_rq() Chris Wilson
2019-01-21 22:21 ` [PATCH 32/34] drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+ Chris Wilson
2019-01-21 22:21 ` [PATCH 33/34] drm/i915: Prioritise non-busywait semaphore workloads Chris Wilson
2019-01-23 0:33 ` Chris Wilson
2019-01-21 22:21 ` [PATCH 34/34] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno Chris Wilson
2019-01-22 0:09 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/34] drm/i915/execlists: Mark up priority boost on preemption Patchwork
2019-01-22 0:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-01-22 0:30 ` ✓ Fi.CI.BAT: success " Patchwork
2019-01-22 1:35 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-01-23 12:00 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/34] drm/i915/execlists: Mark up priority boost on preemption (rev2) Patchwork
2019-01-23 12:11 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-01-23 12:48 ` ✗ Fi.CI.BAT: failure " Patchwork
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