From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com,
manasi.d.navare@intel.com
Subject: [Intel-gfx] [PATCH v2 00/19] drm/i915/dp: dp 2.0 enabling prep work
Date: Mon, 23 Aug 2021 19:18:01 +0300 [thread overview]
Message-ID: <cover.1629735412.git.jani.nikula@intel.com> (raw)
Some review comments addressed, some helpers added for DP 2.0 and UHBR
checks.
BR,
Jani.
Jani Nikula (19):
drm/dp: add DP 2.0 UHBR link rate and bw code conversions
drm/dp: use more of the extended receiver cap
drm/dp: add LTTPR DP 2.0 DPCD addresses
drm/dp: add helper for extracting adjust 128b/132b TX FFE preset
drm/i915/dp: use actual link rate values in struct link_config_limits
drm/i915/dp: read sink UHBR rates
drm/i915/dg2: add TRANS_DP2_CTL register definition
drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode
drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW
drm/i915/dg2: add DG2 UHBR source rates
drm/i915/dp: add max data rate calculation for UHBR rates
drm/i915/dp: add helper for checking for UHBR link rate
drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates
drm/i915/dp: select 128b/132b channel encoding for UHBR rates
drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0
drm/i915/dp: add HAS_DP20 macro
drm/i915/dg2: use 128b/132b transcoder DDI mode
drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH,LOW} for 128b/132b
drm/i915/dg2: update link training for 128b/132b
drivers/gpu/drm/drm_dp_helper.c | 42 ++++++-
drivers/gpu/drm/i915/display/intel_ddi.c | 61 ++++++---
drivers/gpu/drm/i915/display/intel_dp.c | 118 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp.h | 5 +-
.../drm/i915/display/intel_dp_link_training.c | 99 ++++++++++-----
drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 ++-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 25 +++-
include/drm/drm_dp_helper.h | 6 +
9 files changed, 300 insertions(+), 74 deletions(-)
--
2.20.1
next reply other threads:[~2021-08-23 16:18 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-23 16:18 Jani Nikula [this message]
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 01/19] drm/dp: add DP 2.0 UHBR link rate and bw code conversions Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 02/19] drm/dp: use more of the extended receiver cap Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 03/19] drm/dp: add LTTPR DP 2.0 DPCD addresses Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 04/19] drm/dp: add helper for extracting adjust 128b/132b TX FFE preset Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 05/19] drm/i915/dp: use actual link rate values in struct link_config_limits Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 06/19] drm/i915/dp: read sink UHBR rates Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 07/19] drm/i915/dg2: add TRANS_DP2_CTL register definition Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 08/19] drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 09/19] drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 10/19] drm/i915/dg2: add DG2 UHBR source rates Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 11/19] drm/i915/dp: add max data rate calculation for UHBR rates Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 12/19] drm/i915/dp: add helper for checking for UHBR link rate Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 13/19] drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 14/19] drm/i915/dp: select 128b/132b channel encoding for UHBR rates Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 15/19] drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0 Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 16/19] drm/i915/dp: add HAS_DP20 macro Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 17/19] drm/i915/dg2: use 128b/132b transcoder DDI mode Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 18/19] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} for 128b/132b Jani Nikula
2021-08-23 16:18 ` [Intel-gfx] [PATCH v2 19/19] drm/i915/dg2: update link training " Jani Nikula
2021-08-23 16:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: dp 2.0 enabling prep work (rev2) Patchwork
2021-08-23 17:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-23 17:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-23 19:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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