From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: extract common ce->pin_count check
Date: Mon, 1 Oct 2018 14:34:38 -0700 [thread overview]
Message-ID: <d0519b75-bff8-e178-6bb8-6606d9121eb9@intel.com> (raw)
In-Reply-To: <153842813736.32323.10826456234861756361@skylake-alporthouse-com>
On 01/10/18 14:09, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2018-10-01 21:46:56)
>> We already have it coded 3 times and a 4th one is coming for the GuC
>> path in an upcoming patch, so let's move it to a common place.
>
> Nope. It is separate as virtual engine does not follow the same pattern.
> -Chris
>
Would it be worth adding virtual engine knowledge to to_intel_context()?
e.g.:
static inline struct intel_context *
to_intel_context(struct i915_gem_context *ctx,
const struct intel_engine_cs *engine)
{
if (intel_engine_is_virtual(engine)) {
struct virtual_engine *ve = to_virtual_engine(engine);
return &ve->context;
} else {
return &ctx->__engine[engine->id];
}
}
Maybe a bit overkill, but having the same check repeated in 5 versions
of *_context_pin() really bugs me :P
Daniele
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next prev parent reply other threads:[~2018-10-01 21:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-01 20:46 [PATCH] drm/i915: extract common ce->pin_count check Daniele Ceraolo Spurio
2018-10-01 21:09 ` Chris Wilson
2018-10-01 21:34 ` Daniele Ceraolo Spurio [this message]
2018-10-01 22:51 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-10-02 3:03 ` ✓ Fi.CI.IGT: " Patchwork
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