From: "Kahola, Mika" <mika.kahola@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Reject 446-480MHz HDMI clock on GLK
Date: Fri, 5 Feb 2021 06:29:11 +0000 [thread overview]
Message-ID: <daf4a8d667b048b5800b433b01791387@intel.com> (raw)
In-Reply-To: <20210203093044.30532-1-ville.syrjala@linux.intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Wednesday, February 3, 2021 11:31 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: stable@vger.kernel.org
> Subject: [Intel-gfx] [PATCH] drm/i915: Reject 446-480MHz HDMI clock on GLK
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The BXT/GLK DPLL can't generate certain frequencies. We already reject the
> 233-240MHz range on both. But on GLK the DPLL max frequency was
> bumped from 300MHz to 594MHz, so now we get to also worry about the
> 446-480MHz range (double the original problem range). Reject any frequency
> within the higher problematic range as well.
>
> Cc: stable@vger.kernel.org
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3000
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 66e1ac3887c6..b593a71e6517 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2218,7 +2218,11 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,
> has_hdmi_sink))
> return MODE_CLOCK_HIGH;
>
> - /* BXT DPLL can't generate 223-240 MHz */
> + /* GLK DPLL can't generate 446-480 MHz */
> + if (IS_GEMINILAKE(dev_priv) && clock > 446666 && clock < 480000)
> + return MODE_CLOCK_RANGE;
> +
> + /* BXT/GLK DPLL can't generate 223-240 MHz */
> if (IS_GEN9_LP(dev_priv) && clock > 223333 && clock < 240000)
> return MODE_CLOCK_RANGE;
>
> --
> 2.26.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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prev parent reply other threads:[~2021-02-05 6:29 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-03 9:30 [Intel-gfx] [PATCH] drm/i915: Reject 446-480MHz HDMI clock on GLK Ville Syrjala
2021-02-03 16:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-02-03 20:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-05 6:29 ` Kahola, Mika [this message]
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