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From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Ramalingam C <ramalingam.c@intel.com>,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH v5 1/9] drm/i915/gt: Use XY_FAST_COLOR_BLT to clear obj on graphics ver 12+
Date: Tue, 22 Mar 2022 11:10:45 +0100	[thread overview]
Message-ID: <dd95e96f6c9546c5e88cd5334ee000be0b05fa12.camel@linux.intel.com> (raw)
In-Reply-To: <20220321224459.12223-2-ramalingam.c@intel.com>

On Tue, 2022-03-22 at 04:14 +0530, Ramalingam C wrote:
> Use faster XY_FAST_COLOR_BLT cmd on graphics version of 12 and more,
> for clearing (Zero out) the pages of the newly allocated object.
> 
> XY_FAST_COLOR_BLT is faster than the older XY_COLOR_BLT.
> 
> v2:
>   Typo fix at title [Thomas]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gpu_commands.h |  5 +++
>  drivers/gpu/drm/i915/gt/intel_migrate.c      | 43 +++++++++++++++++-
> --
>  2 files changed, 43 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> index d112ffd56418..925e55b6a94f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> @@ -205,6 +205,11 @@
>  
>  #define COLOR_BLT_CMD                  (2 << 29 | 0x40 << 22 | (5 -
> 2))
>  #define XY_COLOR_BLT_CMD               (2 << 29 | 0x50 << 22)
> +#define XY_FAST_COLOR_BLT_CMD          (2 << 29 | 0x44 << 22)
> +#define   XY_FAST_COLOR_BLT_DEPTH_32   (2 << 19)
> +#define   XY_FAST_COLOR_BLT_DW         16
> +#define   XY_FAST_COLOR_BLT_MOCS_MASK  GENMASK(27, 21)
> +#define   XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT 31
>  #define SRC_COPY_BLT_CMD               (2 << 29 | 0x43 << 22)
>  #define GEN9_XY_FAST_COPY_BLT_CMD      (2 << 29 | 0x42 << 22)
>  #define XY_SRC_COPY_BLT_CMD            (2 << 29 | 0x53 << 22)
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
> b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 20444d6ceb3c..73199ebf0671 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -614,20 +614,53 @@ intel_context_migrate_copy(struct intel_context
> *ce,
>         return err;
>  }
>  
> -static int emit_clear(struct i915_request *rq, u64 offset, int size,
> u32 value)
> +static int emit_clear(struct i915_request *rq, u64 offset, int size,
> +                     u32 value, bool is_lmem)
>  {
> -       const int ver = GRAPHICS_VER(rq->engine->i915);
> +       struct drm_i915_private *i915 = rq->engine->i915;
> +       int mocs = rq->engine->gt->mocs.uc_index << 1;
> +       const int ver = GRAPHICS_VER(i915);
> +       int ring_sz;
>         u32 *cs;
>  
>         GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
>  
>         offset += (u64)rq->engine->instance << 32;
>  
> -       cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
> +       if (ver >= 12)
> +               ring_sz = 16;

XY_FAST_COLOR_BLT_DW

With that fixed, 
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


> +       else if (ver >= 8)
> +               ring_sz = 8;
> +       else
> +               ring_sz = 6;
> +
> +       cs = intel_ring_begin(rq, ring_sz);
>         if (IS_ERR(cs))
>                 return PTR_ERR(cs);
>  
> -       if (ver >= 8) {
> +       if (ver >= 12) {
> +               *cs++ = XY_FAST_COLOR_BLT_CMD |
> XY_FAST_COLOR_BLT_DEPTH_32 |
> +                       (XY_FAST_COLOR_BLT_DW - 2);
> +               *cs++ = FIELD_PREP(XY_FAST_COLOR_BLT_MOCS_MASK, mocs)
> |
> +                       (PAGE_SIZE - 1);
> +               *cs++ = 0;
> +               *cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
> +               *cs++ = lower_32_bits(offset);
> +               *cs++ = upper_32_bits(offset);
> +               *cs++ = !is_lmem << XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT;
> +               /* BG7 */
> +               *cs++ = value;
> +               *cs++ = 0;
> +               *cs++ = 0;
> +               *cs++ = 0;
> +               /* BG11 */
> +               *cs++ = 0;
> +               *cs++ = 0;
> +               /* BG13 */
> +               *cs++ = 0;
> +               *cs++ = 0;
> +               *cs++ = 0;
> +       } else if (ver >= 8) {
>                 *cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
>                 *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY |
> PAGE_SIZE;
>                 *cs++ = 0;
> @@ -711,7 +744,7 @@ intel_context_migrate_clear(struct intel_context
> *ce,
>                 if (err)
>                         goto out_rq;
>  
> -               err = emit_clear(rq, offset, len, value);
> +               err = emit_clear(rq, offset, len, value, is_lmem);
>  
>                 /* Arbitration is re-enabled between requests. */
>  out_rq:



  reply	other threads:[~2022-03-22 10:11 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-21 22:44 [Intel-gfx] [PATCH v5 0/9] drm/i915/ttm: Evict and restore of compressed object Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 1/9] drm/i915/gt: Use XY_FAST_COLOR_BLT to clear obj on graphics ver 12+ Ramalingam C
2022-03-22 10:10   ` Thomas Hellström [this message]
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 2/9] drm/i915/gt: Optimize the migration and clear loop Ramalingam C
2022-03-24 15:35   ` Thomas Hellström (Intel)
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 3/9] drm/i915/gt: Clear compress metadata for Flat-ccs objects Ramalingam C
2022-03-24 16:14   ` Thomas Hellström (Intel)
2022-03-28 18:59     ` Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 4/9] drm/i915/selftest_migrate: Consider the possible roundup of size Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 5/9] drm/i915/selftest_migrate: Check CCS meta data clear Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 6/9] drm/i915/gt: offset handling for multiple copy engines Ramalingam C
2022-03-24 16:20   ` Thomas Hellström (Intel)
2022-03-28 18:56     ` Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 7/9] drm/ttm: Add a parameter to add extra pages into ttm_tt Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 8/9] drm/i915/gem: Add extra pages in ttm_tt for ccs data Ramalingam C
2022-03-24 16:28   ` Thomas Hellström
2022-03-28 18:57     ` Ramalingam C
2022-03-21 22:44 ` [Intel-gfx] [PATCH v5 9/9] drm/i915/migrate: Evict and restore the flatccs capable lmem obj Ramalingam C
2022-03-22 11:20   ` [Intel-gfx] [PATCH v6 " Ramalingam C
2022-03-22  1:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ttm: Evict and restore of compressed object (rev3) Patchwork
2022-03-22  1:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-22  1:53 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-22  2:16 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-22 12:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ttm: Evict and restore of compressed object (rev4) Patchwork
2022-03-22 12:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-22 12:08 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-22 12:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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