Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"Manna, Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
	"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [PATCH v6 05/18] drm/i915/alpm: Refactor Auxless wake time calculation
Date: Mon, 28 Sep 2026 11:49:54 +0000	[thread overview]
Message-ID: <def041d44708d80a6769f45c72c8ddcdbe7aeb98.camel@intel.com> (raw)
In-Reply-To: <20260915180449.277933-6-animesh.manna@intel.com>

On Tue, 2026-09-15 at 23:34 +0530, Animesh Manna wrote:
> Divide the auxless wake time calculation in parts which will
> help later to add Xe3p related modification.
> 
> v2: Refactor first existing calculation. [Jani]
> v3: Cosmetic changes. [Jani, Suraj]
> 
> Bspec: 71477
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 31 ++++++++++++++++-----
> --
>  1 file changed, 22 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 901493bb1448..d5823174576a 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -102,6 +102,25 @@ static int get_lfps_half_cycle_clocks(const
> struct intel_crtc_state *crtc_state)
>  		1000 / (2 * LFPS_CYCLE_COUNT);
>  }
>  
> +static int get_tphy2_p2_to_p0(const struct intel_crtc_state
> *crtc_state)
> +{
> +	return 12 * 1000;
> +}
> +
> +static int get_establishment_period(const struct intel_crtc_state
> *crtc_state)
> +{
> +	int t1 = 50 * 1000;
> +	int tps4 = 252;
> +	/* port_clock is link rate in 10kbit/s units */
> +	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state-
> >port_clock;
> +	int tcds, establishment_period;
> +
> +	tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) *
> tml_phy_lock;
> +	establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);

Here you could return SILENCE_PERIOD_TIME + t1 + tcds.

> +
> +	return establishment_period;
> +}
> +
>  /*
>   * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period,
> Max+
>   * tSilence, Max+ tPHY Establishment + tCDS) / tline)
> @@ -123,17 +142,11 @@ static int get_lfps_half_cycle_clocks(const
> struct intel_crtc_state *crtc_state)
>   */
>  static int _lnl_compute_aux_less_wake_time(const struct
> intel_crtc_state *crtc_state)
>  {
> -	int tphy2_p2_to_p0 = 12 * 1000;
> -	int t1 = 50 * 1000;
> -	int tps4 = 252;
> -	/* port_clock is link rate in 10kbit/s units */
> -	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state-
> >port_clock;
> -	int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) +
> 1;

I think you should keep num_ml_phy_lock also in your helper. Just to
keep readability. Also in patch 6 you will have then:

if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
	num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;
} else {
...
	num_ml_phy_lock = 7;
...

tcds = num_ml_phy_lock * tml_phy_lock;

BR,
Jouni Högander

> -	int t2 = num_ml_phy_lock * tml_phy_lock;
> -	int tcds = 1 * t2;
> +	int tphy2_p2_to_p0 = get_tphy2_p2_to_p0(crtc_state);
> +	int establishment_period =
> get_establishment_period(crtc_state);
>  
>  	return DIV_ROUND_UP(tphy2_p2_to_p0 +
> get_lfps_cycle_time(crtc_state) +
> -			    SILENCE_PERIOD_TIME + t1 + tcds, 1000);
> +			    establishment_period, 1000);
>  }
>  
>  static int


  reply	other threads:[~2026-09-28 11:49 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 18:04 [PATCH v6 00/18] Enable DP2.1 alpm Animesh Manna
2026-09-15 18:04 ` [PATCH v6 01/18] drm/i915/alpm: Add DPCD definition for DP2.1 ALPM capability Animesh Manna
2026-09-15 18:04 ` [PATCH v6 02/18] drm/i915/alpm: Move alpm sink capability readout into a separate function Animesh Manna
2026-09-28  9:58   ` Hogander, Jouni
2026-09-28 10:02     ` Hogander, Jouni
2026-09-30  8:04   ` Jani Nikula
2026-10-01 11:21     ` Manna, Animesh
2026-09-15 18:04 ` [PATCH v6 03/18] drm/i915/alpm: alpm_init() for DP2.1 Animesh Manna
2026-09-15 18:57   ` sashiko-bot
2026-09-28 10:44   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 04/18] drm/i915/alpm: Enable debugfs " Animesh Manna
2026-09-28 11:22   ` Hogander, Jouni
2026-10-01 11:32     ` Manna, Animesh
2026-10-08  4:40       ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 05/18] drm/i915/alpm: Refactor Auxless wake time calculation Animesh Manna
2026-09-28 11:49   ` Hogander, Jouni [this message]
2026-09-15 18:04 ` [PATCH v6 06/18] drm/i915/alpm: Auxless wake time calculation for Xe3p Animesh Manna
2026-09-29  5:34   ` Hogander, Jouni
2026-09-29  5:38   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 07/18] drm/i915/alpm: Modify AUX_LESS_WAKE_TIME bitfield for xe3lpd Animesh Manna
2026-09-15 18:46   ` sashiko-bot
2026-09-29  6:20   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 08/18] drm/i915/alpm: table based establishment period Animesh Manna
2026-09-29  7:00   ` Hogander, Jouni
2026-09-29  7:31     ` Hogander, Jouni
2026-10-01 11:40     ` Manna, Animesh
2026-09-15 18:04 ` [PATCH v6 09/18] drm/i915/alpm: Half LFPS cycle calculation Animesh Manna
2026-09-15 18:53   ` sashiko-bot
2026-09-29  9:57   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 10/18] drm/i915/alpm: Modify LFPS cycle count for DP ALPM Animesh Manna
2026-10-01  6:22   ` Hogander, Jouni
2026-10-01 12:10     ` Hogander, Jouni
2026-10-01 12:11       ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 11/18] drm/i915/alpm: Modify LFPS_CYCLE_COUNT bitfield for xe3lpd Animesh Manna
2026-09-15 18:04 ` [PATCH v6 12/18] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM Animesh Manna
2026-09-15 18:56   ` sashiko-bot
2026-09-30  8:16   ` Jani Nikula
2026-10-02  4:41   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 13/18] drm/i915/alpm: Enable MAC Transmitting LFPS for LT PHY Animesh Manna
2026-10-02  5:04   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 14/18] drm/i915/alpm: Replace is_edp() with alpm_is_possible() Animesh Manna
2026-09-15 18:57   ` sashiko-bot
2026-10-02  6:41   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 15/18] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf Animesh Manna
2026-09-15 19:01   ` sashiko-bot
2026-10-02  8:37   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 16/18] drm/i915/alpm: Compute and program switch to active latency Animesh Manna
2026-09-15 18:55   ` sashiko-bot
2026-10-02  9:00   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 17/18] drm/i915/alpm: Program zero-based LFPS half cycle duration Animesh Manna
2026-09-15 19:02   ` sashiko-bot
2026-10-02  9:08   ` Hogander, Jouni
2026-09-15 18:04 ` [PATCH v6 18/18] drm/i915/alpm: Disallow ALPM for UHBR link rate Animesh Manna
2026-09-15 19:01   ` sashiko-bot
2026-10-02 11:33   ` Hogander, Jouni
2026-09-15 21:11 ` ✓ i915.CI.BAT: success for Enable DP2.1 alpm (rev6) Patchwork
2026-09-16  8:14 ` ✗ i915.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=def041d44708d80a6769f45c72c8ddcdbe7aeb98.camel@intel.com \
    --to=jouni.hogander@intel.com \
    --cc=animesh.manna@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=suraj.kandpal@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox